S25FL032A Meet Spansion Inc., S25FL032A Datasheet

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S25FL032A

Manufacturer Part Number
S25FL032A
Description
32 Megabit Cmos 3.0 Volt Flash Memory With 50 Mhz Spi Bus Interface
Manufacturer
Meet Spansion Inc.
Datasheet

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S25FL032A
32 Megabit CMOS 3.0 Volt Flash Memory
with 50-MHz SPI (Serial Peripheral Interface) Bus
Data Sheet
Notice to Readers: This document states the current technical specifications regarding the Spansion
product(s) described herein. Each product described herein may be designated as Advance Information,
Preliminary, or Full Production. See
Publication Number S25FL032A_00
Notice On Data Sheet Designations
Revision C
Amendment 2
for definitions.
Issue Date July 2, 2007
S25FL032A Cover Sheet

Related parts for S25FL032A

S25FL032A Summary of contents

Page 1

... Notice to Readers: This document states the current technical specifications regarding the Spansion product(s) described herein. Each product described herein may be designated as Advance Information, Preliminary, or Full Production. See Publication Number S25FL032A_00 Notice On Data Sheet Designations Revision C Amendment 2 S25FL032A Cover Sheet for definitions. Issue Date July 2, 2007 ...

Page 2

... However, typographical or specification corrections, or modifications to the valid combinations offered may occur.” Questions regarding these document designations may be directed to your local sales office range. Changes may also include those needed to clarify a IO S25FL032A S25FL032A_00_C2 July 2, 2007 ...

Page 3

... RES command one-byte electronic signature for backward compatibility General Description The S25FL032A is a 3.0 Volt (2 3.6 V), single-power-supply Flash memory device. The device consists of 64 sectors, each with 512 Kb memory. The device accepts data written to SI (Serial Input) and outputs data on SO (Serial Output). The devices are designed to be programmed in-system with the standard system 3 ...

Page 4

... Initial Delivery State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 12. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 13. Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 14. DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 15. Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 16. AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 17. Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 17.1 SO3 016—16-pin Wide Plastic Small Outline Package (300-mil Body Width 18. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . S25FL032A S25FL032A_00_C2 July 2, 2007 ...

Page 5

... Maximum Positive Overshoot Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 15.1 AC Measurements I/O Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 16.1 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 16.2 SPI Mode 0 (0,0) Input Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 16.3 SPI Mode 0 (0,0) Output Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 16.4 HOLD# Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 16.5 Write Protect Setup and Hold Timing during WRSR when SRWD July 2, 2007 S25FL032A_00_C2 S25FL032A 5 ...

Page 6

... Tables Table 5.1 S25FL032A Valid Combinations Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 Table 7.1 S25FL032A Protected Area Sizes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Table 8.1 S25FL032A Device Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Table 8.2 S25FL032A Sector Address Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Table 9.1 Read Identification (RDID) Data-Out Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 Table 9.2 S25FL032A Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 Table 9.3 Protection Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 Table 9.4 Command Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 Table 10.1 Power-Up Timing Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 Table 12.1 Absolute Maximum Ratings ...

Page 7

... Block Diagram 2. Connection Diagrams July 2, 2007 S25FL032A_00_C2 SRAM Array - L Logic RD DATA PATH IO Figure 2.1 16-pin Plastic Small Outline Package (SO HOLD VCC CS S25FL032A Array - SCK SI NC ...

Page 8

... Write Protect: Protects the memory area specified by Status Register bits BP2:BP0. When driven low, prevents any program or erase command from altering the data in the protected memory area. Supply Voltage Ground SCK CS# W# HOLD# GND S25FL032A SO S25FL032A_00_C2 July 2, 2007 ...

Page 9

... SPEED 0L = DEVICE TECHNOLOGY A = DENSITY 032 = DEVICE FAMILY S25FL TM Spansion Memory 3.0 Volt-only, Serial Peripheral Interface (SPI) Flash Memory Table 5.1 S25FL032A Valid Combinations Table S25FL032A Valid Combinations Package & Model Speed Option Temperature Number 0L MAI, MFI S25FL032A (Note 1) Tray Tube 13” Tape and Reel No additional ordering options Industrial (– ...

Page 10

... SO SI SCK SCK SO SI SCK SO SI SPI Memory Device CS# W# HOLD# CS# Figure 6.2 SPI Modes Supported CS# SCK SCK MSB SI SO S25FL032A Figure 6.2 for each of the two modes: SCK SO SI SPI Memory SPI Memory Device Device W# HOLD# CS# W# HOLD# MSB S25FL032A_00_C2 July 2, 2007 ...

Page 11

... Status Register The Status Register contains the status and control bits that can be read or set by specific commands (Table 9.2, S25FL032A Status Register on page Write In Progress (WIP): Indicates whether the device is performing a Write Status Register, program or erase operation. Write Enable Latch (WEL): Indicates the status of the internal Write Enable Latch. ...

Page 12

... Table 7.1 S25FL032A Protected Area Sizes Memory Array Protected Protected Address Range Sectors Address Range None (0) 000000h–3FFFFFh 3F0000h–3FFFFFh (1) SA63 000000h–3EFFFFh 3E0000h–3FFFFFh (2) SA63:SA62 000000h–3DFFFFh 3C0000h–3FFFFFh (4) SA63:SA60 000000h– ...

Page 13

... July 2, 2007 S25FL032A_00_C2 7.1. Figure 7.1 Hold Mode Operation Hold Condition (standard use) Table 8.2 shows the starting and ending address for each Table 8.1 S25FL032A Device Organization Each Sector has Each Page has 65,536 256 — S25FL032A Figure 7.1, standard use). If the Hold ...

Page 14

... SA28 SA27 SA26 SA25 SA24 SA23 SA22 SA21 SA20 SA19 SA18 SA17 SA16 Table 8.2 S25FL032A Sector Address Table (Sheet 3F0000h 3E0000h 3D0000h 3C0000h 3B0000h 3A0000h 390000h 380000h 370000h 360000h 350000h 340000h 330000h 320000h 310000h 300000h ...

Page 15

... CS# is driven low is an exact multiple of eight. The device ignores any attempt to access the memory array during a Write Status Register, program, or erase operation, and continues the operation uninterrupted. July 2, 2007 S25FL032A_00_C2 Table 8.2 S25FL032A Sector Address Table (Sheet 0F0000h 0E0000h 0D0000h 0C0000h 0B0000h ...

Page 16

... Figure 9.1 Read Data Bytes (READ) Command Sequence Command 24-Bit Address MSB S25FL032A ) presented SCK Data Out 1 Data Out MSB S25FL032A_00_C2 July 2, 2007 ...

Page 17

... FAST_READ command issued while it is executing a program, erase, or Write Status Register operation, and continues the operation uninterrupted. Figure 9.2 Read Data Bytes at Higher Speed (FAST_READ) Command Sequence CS# Mode SCK Mode 0 SI Hi-Z SO July 2, 2007 S25FL032A_00_C2 Figure 9 ...

Page 18

... Table 9.4 on page Command Manufacturer Identification MSB Table 9.1 Read Identification (RDID) Data-Out Sequence Memory Type 01h S25FL032A 26 Device Identification Device Identification Memory Capacity 02h 15h S25FL032A_00_C2 July 2, 2007 ...

Page 19

... Write Disable (WRDI) command completion Write Status Register (WRSR) command completion Page Program (PP) command completion Sector Erase (SE) command completion Bulk Erase (BE) command completion July 2, 2007 S25FL032A_00_C2 Figure 9.4) sets the Write Enable Latch (WEL) bit which Figure 9.4 Write Enable (WREN) Command Sequence ...

Page 20

... The Write Status Register (WRSR) command controls these bits, which are non-volatile. When one or more of these bits is set to 1, the corresponding memory area (see Table 9.2 S25FL032A Status Register Bit Function 1 = Protects when W# is low Status Register Write Disable protection, even when W# is low — ...

Page 21

... HPM, the size of the protected area of the memory array cannot be changed. Note that HPM provides no protection to the memory array area outside that specified by BP2:BP0 (Software Protected Mode, or SPM). July 2, 2007 S25FL032A_00_C2 Table 9.2, S25FL032A Status Register on page 20 Figure 9.7 Write Status Register (WRSR) Command Sequence CS Mode 3 ...

Page 22

... Data Byte MSB S25FL032A . The Status Register may Data Byte MSB Data Byte 256 MSB S25FL032A_00_C2 July 2, 2007 ...

Page 23

... Write Enable Latch to 0 before the operation completes (the exact timing is not specified). The device only executes a BE command if all Block Protect bits (BP2:BP0) are 0 (see on page 12). Otherwise, the device ignores the command. July 2, 2007 S25FL032A_00_C2 Table 7.1 on page 12 valid address for the SE command ...

Page 24

... Mode 0 Command Hi-Z (see Table 14.1 on page 29). DP Section 9.12 and 9.12.1). Figure 9.11 Deep Power Down (DP) Command Sequence Command Standby Mode S25FL032A Figure 9.11 and Table 9.4 the device enters the DP mode and current DP Deep Power-down Mode S25FL032A_00_C2 July 2, 2007 ...

Page 25

... The RES command always provides access to the Electronic Signature of the device and can be applied even if DP mode has not been entered. Any RES command issued while an erase, program, or WRSR operation is in progress not executed, and the operation continues uninterrupted. July 2, 2007 S25FL032A_00_C2 Figure 9.12 after the 8-bit RES command byte ...

Page 26

... Power Saving RES Notes 1. The S25FL032A has a manufacturer ID of 01h, and a device ID consisting of the memory type (02h) and the memory capacity (15h). 2. The S25FL032A has an Electronic Signature ID of 15h. 10. Power-up and Power-down During power-up and power-down, certain conditions must be observed. CS# must follow the voltage applied ...

Page 27

... PU 11. Initial Delivery State The device is delivered with all bits set to 1 (each byte contains FFh) upon initial factory shipment. The Status Register contains 00h (all Status Register bits are 0). July 2, 2007 S25FL032A_00_C2 Figure 10.1 Power-Up Timing Diagram ...

Page 28

... Figure 12.2 Maximum Positive Overshoot Waveform +2 +0 Table 13.1 Operating Ranges Description ) Industrial A Voltage Range S25FL032A Rating –65°C to +150°C –0 +0 –2.0 V for periods Rating –40°C to +85°C 2 3.6 V S25FL032A_00_C2 July 2, 2007 ...

Page 29

... IH V Output Low Voltage OL V Output High Voltage OH Note Typical values are 15. Test Conditions Input Levels Symbol C L July 2, 2007 S25FL032A_00_C2 Table 14.1 DC Characteristics (CMOS Compatible) Test Conditions (See Note) SCK = 0.1 V /0. SCK = 0.1 V /0. CS ...

Page 30

... Min (Notes) (Notes) Unit D.C. 33 MHz D.C. 50 MHz 0.1 V/ns 0.1 V/ 100 150 ms μs 3 μs 30 1.5 (1) 3 (2) ms 0.5 (1) 3 (2) sec 25 (1) 192 (2) sec S25FL032A_00_C2 July 2, 2007 ...

Page 31

... CS# t CSH SCK SI Hi-Z SO CS# SCK July 2, 2007 S25FL032A_00_C2 Figure 16.2 SPI Mode 0 (0,0) Input Timing t CSS SU:DAT CRT HD:DAT t CFT MSB IN Figure 16.3 SPI Mode 0 (0,0) Output Timing S25FL032A CSH CSS LSB ...

Page 32

... CS# SCK SO SI HOLD# Figure 16.5 Write Protect Setup and Hold Timing during WRSR when SRWD=1 W# CS# SCK SI Hi Figure 16.4 HOLD# Timing WPS S25FL032A WPH S25FL032A_00_C2 July 2, 2007 ...

Page 33

... July 2, 2007 S25FL032A_00_C2 NOTES: 1. ALL DIMENSIONS ARE IN BOTH INCHES AND MILLMETERS. 2. DIMENSIONING AND TOLERANCING PER ASME Y14.5M - 1994. 3. DIMENSION D DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, MAX PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0 ...

Page 34

... Rewrote entire document for better flow and clarity. No specifications were changed. Revision C1 (February 23, 2006) Global Changed document status from “Preliminary” to “Full Production”. Absolute Maximum Rating Add overshoot/undershoot spec Revision C2 (July 2, 2007) Device Operations Added sentence to Byte or Page Programming Description . CC2 S25FL032A S25FL032A_00_C2 July 2, 2007 ...

Page 35

... Copyright © 2005-2007 Spansion Inc. All rights reserved. Spansion and combinations thereof, are trademarks of Spansion LLC in the US and other countries. Other names used are for informational purposes only and may be trademarks of their respective owners. July 2, 2007 S25FL032A_00_C2 ® ...

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