ltc1411 Linear Technology Corporation, ltc1411 Datasheet - Page 12

• Manufacturer Part Number: ltc1411
• Description: Single Supply 14-bit 2.5msps Adc
• Manufacturer: Linear Technology Corporation

APPLICATIO S I FOR ATIO
LTC1411
Figure 7 shows a typical reference, the LT1019A-2.5
connected to the LTC1411. This will provide an improved
drift (equal to the maximum 5ppm/ C of the LT1019A-2.5).
Digital Interface
The ADC has a very simple digital interface with only one
control input, CONVST. A logic low applied to the CONVST
input will initiate a conversion. The ADC presents digital
data in 2’s complement format with bipolar zero set by the
voltage applied to the A
Internal Clock
The internal clock is factory trimmed to achieve a typical
conversion time of 260ns. With the typical acquisition
time of 100ns, a throughput sampling rate of 2.5Msps is
guaranteed.
Out-of-the-Range Signal (OTR)
The LTC1411 has a digital output, OTR, that indicates if an
analog input signal is out of range. The OTR remains
low when the analog input is within the specified range.
Once the analog signal goes to the most negative input
(1000 0000 0000 00) or 64LSB above the specified most
positive input, OTR will go high. By NORing D13 (MSB)
and its complement with OTR, overrange and underrange
can be detected as shown in Figure 8. Table 2 is the truth
table of the out-of-the-range circuit in Figure 8.
Power Shutdown (Sleep and Nap Modes)
The LTC1411 provides two shutdown features that will
save power when the ADC is inactive.
12
INPUT RANGE:
0.7V TO 4.3V
Figure 7. Supplying a 2.5V Reference Voltage
to the LTC1411 with the LT1019A-2.5
LT1019A-2.5
GND
V
5V
IN
U
4
2
V
OUT
IN
6
–
U
pin.
3
10 F
W
1
2
4
7, 8, 9
A
A
REFIN
IN
IN
LTC1411
AGND
+
–
U
5V
1411 F07
By driving the SLP pin low for Sleep mode, the ADC shuts
down to less than 1 A. After release from the Sleep mode,
the ADC needs 210ms (10 F bypass capacitor on the
REFCOM2 pin) to wake up.
In Nap mode, all the power is off except the internal refer-
ence which is still active for the other external circuitry. In
this mode the ADC draws about 2mA instead of 39mA (for
minimum power, the logic inputs must be within 600mV
from the supply rails). The wake-up time from Nap mode
to active state is 250ns as shown in Figure 9.
Board Layout and Bypassing
Wire wrap boards are not recommended for high resolu-
tion or high speed A/D converters. To obtain the best
performance from the LTC1411, a printed circuit board
with a ground plane is required. Layout for the printed
circuit board should ensure that the digital and analog
signal lines are separated as much as possible. In particu-
lar, care should be taken not to run any digital track
alongside an analog signal track.
Table 2. Out-of-the-Range Truth Table
OTR
0
0
1
1
Figure 8. Overrange and Underrange Logic
Figure 9. NAP to CONVST Wake-Up Timing
OTR
D13
D13
CONVST
NAP
U1-A, U1-B = 74HC OR EQUIVALENT
D13 (MSB)
U1-A
U1-B
0
1
0
1
t
1
“1” FOR OVERRANGE
“1” FOR UNDERRANGE
ANALOG INPUT
Underrange
Overrange
In Range
In Range
1411 F09
1411 F08
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