ltc1411 Linear Technology Corporation, ltc1411 Datasheet - Page 8

• Manufacturer Part Number: ltc1411
• Description: Single Supply 14-bit 2.5msps Adc
• Manufacturer: Linear Technology Corporation

APPLICATIO S I FOR ATIO
LTC1411
TEST CIRCUITS
CONVERSION DETAILS
The LTC1411 uses a successive approximation algorithm
and an internal sample-and-hold circuit to convert an
analog signal to a 14-bit parallel output. The ADC is
complete with a precision reference, internal clock and a
programmable input range. The device is easy to interface
with microprocessors and DSPs. (Please refer to the
Digital Interface section for the data format.)
Conversions are started by a falling edge on the CONVST
input. Once a conversion cycle has begun, it cannot be
restarted. Between conversions, the ADC acquires the
analog input in preparation for the next conversion. In the
acquire phase, a minimum time of 100ns will provide
enough time for the sample-and-hold capacitors to ac-
quire the analog signal.
8
1
2
(A) Hi-Z TO V OH AND V OL TO V OH
A
A
36
IN
IN
+
–
SLP
DN
35
Figure 1. Simplified Block Diagram
CONTROL LOGIC
NAP
Load Circuits for Access Timing
1k
INTERNAL
CLOCK
34
+
–
U
PGA0
C
L
14-BIT
ADC
10
33
U
AVP
PGA1
(B) Hi-Z TO V OL AND V OH TO V OL
30
32
14
DVP
DN
CONVST
W
DRIVERS
OUTPUT
5V
31
1k
C
DGND
L
U
OGND
BUSY
1411 TC01
OV
OTR
D13
D0
DD
1411 F01
•
•
•
29
28
12
25
27
26
During the conversion, the internal differential 14-bit
capacitive DAC output is sequenced by the SAR from the
most significant bit (MSB) to the least significant bit
(LSB). The input is successively compared with the binary
weighted charges supplied by the differential capacitive
DAC. Bit decisions are made by a high speed comparator.
At the end of a conversion, the DAC output balances the
analog input (A
data word) which represents the difference of A
A
DYNAMIC PERFORMANCE
The LTC1411 has excellent high speed sampling capabil-
ity. FFT (Fast Fourier Transform) test techniques are used
to test the ADC’s frequency response, distortion and noise
at the rated throughput. By applying a low distortion sine
wave and analyzing the digital output using an FFT algo-
rithm, the ADC’s spectral content can be examined for
frequencies outside the fundamental. Figure 2a shows a
typical LTC1411 FFT plot.
Signal-to-Noise
The signal-to-(noise + distortion) ratio [S/N + D)] is the
ratio between the RMS amplitude of the fundamental input
frequency to the RMS amplitude of all other frequency
components at the A/D output. The output is band limited
to frequencies from the above DC and below half the
sampling frequency. Figure 2a shows a typical spectral
content with a 2.5MHz sampling rate and a 100kHz input.
The dynamic performance holds well to higher input
frequencies (see Figure 2b).
IN
–
are loaded into the 14-bit output latches.
DN
Load Circuits for Output Float Delay
(A) V OH TO Hi-Z
IN
+
1k
– A
IN
C
–
L
). The SAR contents (a 14-bit
DN
(B) V OL TO Hi-Z
5V
1k
1411 TC02
C
L
IN
+
and
1411f