ltc1598l Linear Technology Corporation, ltc1598l Datasheet - Page 7

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ltc1598l

Manufacturer Part Number
ltc1598l
Description
4- And 8-channel, 3v Micropower Sampling 12-bit Serial I/o A/d Converters
Manufacturer
Linear Technology Corporation
Datasheet

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PIN
LTC1594L
CH0 (Pin 1): Analog Multiplexer Input.
CH1 (Pin 2): Analog Multiplexer Input.
CH2 (Pin 3): Analog Multiplexer Input.
CH3 (Pin 4): Analog Multiplexer Input.
ADCIN (Pin 5): ADC Input. This input is the positive analog
input to the ADC. Connect this pin to MUXOUT for normal
operation.
V
the span of the ADC.
COM (Pin 7): Negative Analog Input. This input is the
negative analog input to the ADC and must be free of noise
with respect to GND.
GND (Pin 8): Analog Ground. GND should be tied directly
to an analog ground plane.
CSADC (Pin 9): ADC Chip Select Input. A logic high on this
input powers down the ADC and three-states D
low on this input enables the ADC to sample the selected
channel and start the conversion. For normal operation,
drive this pin in parallel with CSMUX.
LTC1598L
CH5 (Pin 1): Analog Multiplexer Input.
CH6 (Pin 2): Analog Multiplexer Input.
CH7 (Pin 3): Analog Multiplexer Input.
GND (Pin 4): Analog Ground. GND should be tied directly
to an analog ground plane.
CLK (Pin 5): Shift Clock. This clock synchronizes the serial
data transfer to both MUX and ADC. It also determines the
conversion speed of the ADC.
CSMUX (Pin 6): MUX Chip Select Input. A logic high on
this input allows the MUX to receive a channel address. A
logic low enables the selected MUX channel and connects
it to the MUXOUT pin for A/D conversion. For normal
operation, drive this pin in parallel with CSADC.
D
shifted into this input.
REF
IN
U
(Pin 7): Digital Data Input. The multiplexer address is
(Pin 6): Reference Input. The reference input defines
FUNCTIONS
U
U
OUT
. A logic
D
result is shifted out of this output.
V
power to the ADC. It must be bypassed directly to the
analog ground plane.
CLK (Pin 12): Shift Clock. This clock synchronizes the
serial data transfer to both MUX and ADC.
CSMUX (Pin 13): MUX Chip Select Input. A logic high on
this input allows the MUX to receive a channel address. A
logic low enables the selected MUX channel and connects
it to the MUXOUT pin for A/D conversion. For normal
operation, drive this pin in parallel with CSADC.
D
is shifted into this input.
MUXOUT (Pin 15): MUX Output. This pin is the output of
the multiplexer. Tie to ADCIN for normal operation.
V
tied to Pin 11.
COM (Pin 8): Negative Analog Input. This input is the
negative analog input to the ADC and must be free of noise
with respect to GND.
GND (Pin 9): Analog Ground. GND should be tied directly
to an analog ground plane.
CSADC (Pin 10): ADC Chip Select Input. A logic high on
this input deselects and powers down the ADC and three-
states D
sample the selected channel and start the conversion. For
normal operation drive this pin in parallel with CSMUX.
D
result is shifted out of this output.
NC (Pin 12): No Connection.
NC (Pin 13): No Connection.
CLK (Pin 14): Shift Clock. This input should be tied to Pin 5.
CC
CC
OUT
IN
OUT
(Pin 14): Digital Data Input. The multiplexer address
(Pin 16): Power Supply Voltage. This pin should be
(Pin 11): Power Supply Voltage. This pin provides
(Pin 10): Digital Data Output. The A/D conversion
(Pin 11): Digital Data Output. The A/D conversion
OUT
. A logic low on this input enables the ADC to
LTC1594L/LTC1598L
15948lfb
7

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