mcs1000 MosChip, mcs1000 Datasheet - Page 23

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mcs1000

Manufacturer Part Number
mcs1000
Description
Security Processor
Manufacturer
MosChip
Datasheet
Rev. 1.1
The MCS1000 has three (3) Fast Ethernet controllers. These controllers consist of a MAC and a PHY. The
PHY interfaces are brought off-chip in normal mode (3 PHY mode). The PHYs can be connected directly to
Ethernet magnetics. There are two configurations for the PHYs. The standard configuration brings all three
PHYs to the IC’s pins. In the alternate configuration two PHYs and one MII are brought out to the IC’s pins.
See table below for pin-out details.
ETH_C_LED[0]
ETH_C_LED[1]
ETH_C_LED[2]
ETH_A_LED[0]
ETH_A_LED[1]
ETH_A_LED[2]
ETH_B_LED[0]
ETH_B_LED[1]
ETH_B_LED[2]
Pin Name
GPIO[10]
GPIO[11]
GPIO[12]
GPIO[13]
GPIO[14]
GPIO[15]
GPIO[8]
GPIO[9]
DCD_N
CTS_N
RI_N
DSR
Ethernet PHY Alternate Configuration Interface Pins
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
I
I
I
I
Location
P17
R18
U20
V20
T20
T19
T18
T17
W1
W3
W2
G2
G1
H3
U3
H1
A2
B2
B3
J3
J4
MII_RX_DATA[0]
MII_RX_DATA[1]
MII_RX_DATA[2]
MII_RX_DATA[3]
MII_TX_DATA[0]
MII_TX_DATA[1]
MII_TX_DATA[2]
MII_TX_DATA[3]
MII_TX_MDC
MII_RX_ERR
MII_TX_ERR
MII_RX_CLK
MII_TX_CLK
MII_RX_VAL
No Connect
No Connect
No Connect
MII_TX_EN
MII_MDIO
Alternate
Function
MII_COL
MII_CRS
MCS1000
Security Processor
I/O
I/O
NA
NA
NA
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
Page 23

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