sam3s16 ATMEL Corporation, sam3s16 Datasheet
sam3s16
Related parts for sam3s16
sam3s16 Summary of contents
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... Capture Mode • Package – 100-lead LQFP mm, pitch 0.5 mm ® , RS-485, SPI, Manchester and Modem Mode AT91SAM ARM-based Flash MCU SAM3S16 Preliminary Summary NOTE: This is a summary document. The complete document is available on the Atmel website at www.atmel.com. 11117AS–ATARM–12-Jul-11 ...
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... SAM3S16 Description Atmel's SAM3S16 is a member of a family of Flash microcontrollers based on the high perfor- mance 32-bit ARM Cortex-M3 RISC processor. It operates at a maximum speed of 100 MHz and features 1024 Kbytes of Flash and 128 Kbytes of SRAM. The peripheral set includes a Full Speed USB Device port with embedded transceiver, a High Speed MCI for SDIO/SD/MMC, an ...
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... SAM3S16 Block Diagram Figure 2-1. SAM3S16 100-pin Version Block Diagram System Controller TST PCK0-PCK2 PLLA PMC PLLB RC 12/8/4 M 3-20 MHz XIN Osc. XOUT SUPC XIN32 OSC 32k XOUT32 RC 32k ERASE 8 GPBREG RTT VDDIO RTC VDDCORE POR VDDPLL RSTC NRST WDT SM PIOA / PIOB / PIOC ...
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... Test Mode Select /Serial Wire Input/Output JTAGSEL JTAG Selection Flash and NVM Configuration Bits Erase ERASE Command NRST Synchronous Microcontroller Reset TST Test Select SAM3S16 Preliminary 4 gives details on the signal names classified by peripheral. Type Power Supplies Power Power Power Power Power ...
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... NAND Flash Logic Output Output High Speed Multimedia Card Interface - HSMCI I/O I/O I/O I/O I/O Input Output Input I/O Input Input Input SAM3S16 Preliminary Active Voltage Level Reference Comments Reset State: - PIO or System IOs VDDIO - Internal pull-up enabled - Schmitt Trigger enabled VDDIO Low Low Low Low Low ...
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... TWIx Two-wire Serial Data TWCKx TWIx Two-wire Serial Clock ADC, DAC and Analog Comparator ADVREF Reference AD0 - AD14 Analog Inputs ADTRG ADC Trigger DAC0 - DAC1 Analog output DACTRG DAC Trigger SAM3S16 Preliminary 6 Type Synchronous Serial Controller - SSC Output Input I/O I/O I/O I/O Timer/Counter - TC Input I/O I/O ...
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... Fast Flash Programming Interface - FFPI Input Input I/O Output Output Input Input Input USB Full Speed Device Analog, Digital for restriction on voltage range of Analog Cells. SAM3S16 Preliminary Active Voltage Level Reference Comments VDDIO High Low VDDIO Low Low Reset State: VDDIO - USB Mode ...
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... Package and Pinout SAM3S16 4.1 100-lead LQFP Package Outline Figure 4-1. SAM3S16 Preliminary 8 Orientation of the 100-lead LQFP Package 75 76 100 11117AS–ATARM–12-Jul-11 ...
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... LQFP Pinout Table 4-1. 100-lead LQFP SAM3S16 Pinout 1 ADVREF 2 GND 3 PB0/AD4 4 PC29/AD13 5 PB1/AD5 6 PC30/AD14 7 PB2/AD6 8 PC31 9 PB3/AD7 10 VDDIN 11 VDDOUT 12 PA17/PGMD5/AD0 13 PC26 14 PA18/PGMD6/AD1 15 PA21/PGMD9/AD8 16 VDDCORE 17 PC27 18 PA19/PGMD7/AD2 19 PC15/AD11 20 PA22/PGMD10/AD9 21 PC13/AD10 22 PA23/PGMD1 23 PC12/AD12 24 PA20/PGMD8/AD3 25 PC0 11117AS–ATARM–12-Jul-11 26 GND 51 27 VDDIO 52 28 ...
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... Voltage Regulator The SAM3S16 embeds a voltage regulator that is managed by the Supply Controller. This internal regulator is intended to supply the internal core of SAM3S16. It features two differ- ent operating modes: • In Normal mode, the voltage regulator consumes less than 500 µA static current and draws output current. Internal adaptive biasing adjusts the regulator quiescent current depending on the required load current. In Wait Mode, quiescent current is only 5 µ ...
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... For USB, VDDIO needs to be greater than 3.0V For ADC, VDDIN needs to be greater than 2.0V For DAC, VDDIN needs to be greater than 2.4V below provides an example of the powering scheme when using a backup battery. for further details. SAM3S16 Preliminary VDDIO USB Transceivers. ADC, DAC Analog Comp ...
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... Backup mode is based on the Cortex-M3 deepsleep mode with the voltage regulator disabled. The SAM3S16 can be awakened from this mode through WUP0-15 pins, the supply monitor (SM), the RTT or RTC wake-up event. Backup mode is entered by using WFE instructions with the SLEEPDEEP bit in the System Con- trol Register of the Cortex-M3 set to 1 ...
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... Startup”). RTC or RTT Alarm and USB wake-up events Internal Main clock resynchronization cycles are necessary between the writing of MOSCRCEN bit and the effective entry in Wait mode. Depending on the user application, Waiting for MOSCRCEN bit to be cleared is recommended to ensure that the core will not execute undesired instructions. SAM3S16 Preliminary 13 ...
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... The external loads on PIOs are not taken into account in the calculation. 3. Supply Monitor current consumption is not included. 4. Total Current consumption. 5. Depends on MCK frequency this mode the core is supplied and not clocked but some peripherals can be clocked. SAM3S16 Preliminary 14 Potential Wake Up Mode Entry Sources ...
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... Wake-up Source SMEN sm_out RTCEN rtc_alarm RTTEN rtt_alarm WKUPT0 Falling/Rising WKUP0 Edge Detector WKUPT1 Falling/Rising WKUP1 Edge Detector WKUPT15 Falling/Rising WKUP15 Edge Detector 11117AS–ATARM–12-Jul-11 WKUPEN0 WKUPIS0 SLCK WKUPEN1 WKUPIS1 WKUPEN15 WKUPIS15 SAM3S16 Preliminary WKUPDBC WKUPS Debouncer Core Supply Restart 15 ...
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... Power Management Controller. As soon as the fast start-up signal is asserted, the PMC automatically restarts the embedded 4/8/12 MHz fast RC oscillator, switches the mas- ter clock on this 4MHz clock and reenables the processor clock. Figure 5-5. WKUP0 WKUP1 WKUP15 SAM3S16 Preliminary 16 Figure 5-5, is fully asynchronous and provides a fast start- Fast Start-Up Circuitry FSTT0 FSTP0 ...
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... The input output buffers of the PIO lines are supplied through VDDIO power supply rail. The SAM3S16 embeds high speed pads able to handle MHz for HSMCI, 45 MHz for SPI clock lines and 35 MHz on other lines. See AC Characteristics Section in the Electrical Characteristics Section of the datasheet for more details. Typical pull-up and pull-down value is 100 kΩ ...
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... Debug Port is active, TDO/TRACESWO can be used for trace. The asynchronous TRACE output (TRACESWO) is multiplexed with TDO. So the asynchronous trace can only be used with SW-DP, not JTAG-DP. For more information about SW-DP and JTAG-DP switching, please refer to the Debug and Test Section. SAM3S16 Preliminary 18 Constraints for Other function ...
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... Test Pin The TST pin is used for JTAG Boundary Scan Manufacturing Test or Fast Flash programming mode of the SAM3S16. The TST pin integrates a permanent pull-down resistor of about 15 kΩ to GND, so that it can be left unconnected for normal operations. To enter fast programming mode, see the Fast Flash Programming Interface (FFPI) section. For more on the manufacturing and test mode, refer to the “ ...
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... Table 7-1. Master 0 Master 1 Master 2 Master 3 7.4 Matrix Slaves The Bus Matrix of the SAM3S16 product manages 5 slaves. Each slave has its own arbiter, allowing a different arbitration per slave. Table 7-2. Slave 0 Slave 1 Slave 2 Slave 3 Slave 4 ...
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... TWI0 UART1 UART0 USART1 USART0 DAC SSC HSMCI PIOA TWI1 TWI0 UART1 11117AS–ATARM–12-Jul-11 SAM3S16 Master to Slave Access Masters Internal SRAM Internal ROM Internal Flash External Bus Interface Peripheral Bridge Peripheral DMA Controller Channel T/R 100 Pins Transmit Transmit Transmit ...
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... Data Watchpoint and Trace (DWT) unit for implementing watchpoints, data tracing, and system profiling • Instrumentation Trace Macrocell (ITM) for support of printf style debugging • IEEE1149.1 JTAG Boundary-can on All Digital Pins SAM3S16 Preliminary 22 Peripheral DMA Controller (Continued) Channel T/R 100 Pins ...
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... Product Mapping Figure 8-1. SAM3S16 Product Mapping Code 0x00000000 Boot Memory 0x00400000 Internal Flash 0x00800000 Internal ROM 0x00C00000 Reserved 0x1FFFFFFF External RAM 0x60000000 SMC Chip Select 0 0x61000000 SMC Chip Select 1 0x62000000 SMC Chip Select 2 0x63000000 SMC Chip Select 3 0x64000000 Reserved 0x9FFFFFFF offset ...
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... Embedded Memories 9.1.1 Internal SRAM The SAM3S16 product (1024-Kbyte internal Flash version) embeds a total of 128 Kbytes high- speed SRAM. The SRAM is accessible over System Cortex-M3 bus at address 0x2000 0000. The SRAM is in the bit band region. The bit band alias region is mapped from 0x2200 0000 to 0x23FF FFFF ...
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... The larger sector has 96 pages of 512 Bytes From Sector The rest of the array is composed of 64-KByte sectors of 128 pages, each page of 512 bytes. Refer to Figure 9-2. SAM3S16 Flash size is 1024 KBytes. Refer to 11117AS–ATARM–12-Jul-11 Figure 9-2, "Flash Sector Organization" Flash Sector Organization ...
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... Flash organization, thus making the software generic. 9.1.3.4 Flash Speed The user needs to set the number of wait states depending on the frequency used. For more details, refer to the AC Characteristics sub section in the product Electrical Character- istics Section. SAM3S16 Preliminary 26 Flash Size Flash 1 MByte KBytes KBytes KBytes 11117AS– ...
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... Security Bit Feature The SAM3S16 features a security bit, based on a specific General Purpose NVM bit (GPNVM bit 0). When the security is enabled, any access to the Flash, SRAM, Core Registers and Internal Peripherals either through the ICE interface or through the Fast Flash Programming Interface, is forbidden. This ensures the confidentiality of the code programmed in the Flash. This security bit can only be enabled, through the command “ ...
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... Setting GPNVM Bit 1 selects the boot from the Flash, clearing it selects the boot from the ROM. Asserting ERASE clears the GPNVM Bit 1 and thus selects the boot from the ROM by default. 9.2 External Memories The SAM3S16 features an External Bus Interface to provide the interface to a wide range of external memories and to any parallel peripheral. 9.2.1 Static Memory Controller • ...
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... Additional Logic for NAND Flash 10. System Controller The System Controller is a set of peripherals, which allow handling of key elements of the sys- tem, such as power, resets, clocks, time, interrupts, watchdog, etc... See the system controller block diagram in 11117AS–ATARM–12-Jul-11 SAM3S16 Preliminary Figure 10-1. 29 ...
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... MHz RC Main Clock Oscillator MAINCK Power Management MHz Controller XTAL Oscillator PLLACK MAINCK PLLA PLLBCK MAINCK PLLB Figure 8-1, "SAM3S16 Product VDDOUT Software Controlled VDDIN Voltage Regulator VDDIO PIOA/B/C PIOx Input/Output Buffers Analog Comparator ADx ADC Analog Circuitry ADVREF DAC Analog ...
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... Power-on-Reset, Brownout and Supply Monitor The SAM3S16 embeds three features to monitor, warn and/or reset the chip: • Power-on-Reset on VDDIO • Brownout Detector on VDDCORE • Supply Monitor on VDDIO 10.2.1 Power-on-Reset The Power-on-Reset monitors VDDIO always activated and monitors voltage at start up but also during power down ...
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... One 80 to 240 MHz PLL (PLLB) providing a clock for the USB Full Speed Controller • One 80 to 240 MHz programmable PLL (PLLA), capable to provide the clock MCK to the processor and to the peripherals. The PLLA input frequency is from MHz. Figure 10-2. Clock Generator Block Diagram SAM3S16 Preliminary 32 Clock Generator On Chip ...
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... By default, at startup the chip runs out of the Master Clock using the fast RC oscillator running at 4 MHz. The user can trim the 8 and 12 MHz RC Oscillator frequency by software. Figure 10-3. SAM3S16 Power Management Controller Block Diagram SLCK MAINCK PLLACK PLLBCK 11117AS– ...
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... Support for tail-chaining and late arrival of interrupts. – back-to-back interrupt processing without the overhead of state saving and • Processor state automatically saved on interrupt entry, and restored on interrupt exit, with no instruction overhead. SAM3S16 Preliminary 34 Controller restoration between interrupts. 11117AS–ATARM–12-Jul-11 ...
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... Programmable pull-up or pull-down on each I/O line – Pin data status register, supplies visibility of the level on the pin at any time • Synchronous output, provides Set and Clear of several I/O lines in a single write 11117AS–ATARM–12-Jul-11 SAM3S16 Chip IDs Register Flash Size Chip Name (KBytes) ...
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... TC0 24 TC1 25 TC2 26 TC3 27 TC4 28 TC5 29 ADC 30 DACC 31 PWM 32 CRCCU 33 ACC 34 UDP SAM3S16 Preliminary 36 defines the Peripheral Identifiers of the SAM3S16. A peripheral identifier is required NVIC Interrupt PMC Clock Control Instance Description ...
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... Peripheral Signal Multiplexing on I/O Lines The SAM3S16 product features 3 PIO controllers on the 100-pin version, (PIOA, PIOB, PIOC), that multiplex the I/O lines of the peripheral set. The SAM3S16 100-pin PIO Controllers control lines. (See assigned to one of three peripheral functions The multiplexing tables in the following pages define how the I/O lines of the peripherals A, B and C are multiplexed on the PIO Control- lers. The column “ ...
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... CTS1 PWMH2 PA26 DCD1 TIOA2 PA27 DTR1 TIOB2 PA28 DSR1 TCLK1 PA29 RI1 TCLK2 PA30 PWML2 NPCS2 PA31 NPCS1 PCK2 SAM3S16 Preliminary 38 Peripheral C Extra Function A17 WKUP0 A18 WKUP1 DATRG WKUP2 WKUP3 WKUP4 WKUP5 PWMFI0 WKUP6 WKUP7 WKUP8 WKUP14/PIODCEN1 PWML3 PWML2 ...
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... PB11 PB12 PWML1 PB13 PWML2 PB14 NPCS1 11117AS–ATARM–12-Jul-11 Peripheral C Extra Function NPCS2 AD6/ WKUP12 PCK2 PWMH2 PWML0 PCK0 PWMH3 SAM3S16 Preliminary System Function AD4 AD5 AD7 TDI WKUP13 TDO/TRACESWO TMS/SWDIO TCK/SWCLK XOUT XIN DDM DDP ERASE DAC0 DAC1 ...
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... PC20 A2 PC21 A3 PC22 A4 PC23 A5 PC24 A6 PC25 A7 PC26 A8 PC27 A9 PC28 A10 PC29 A11 PC30 A12 PC31 A13 SAM3S16 Preliminary 40 Peripheral C Extra Function PWML0 PWML1 PWML2 PWML3 NPCS1 PWML0 PWML1 PWMH0 PWMH1 PWMH2 PWMH3 PWML3 TIOA3 TIOB3 TCLK3 TIOA4 TIOB4 TCLK4 TIOA5 TIOB5 ...
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... Automatic Echo, Local Loopback and Remote Loopback Channel Modes – Support for two PDC channels with connection to receiver and transmitter 11117AS–ATARM–12-Jul-11 peripherals Sensors and data per chip select Generator SAM3S16 Preliminary ® and 3-wire EEPROMs 2 C compatible devices 41 ...
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... Receiver and transmitter include a data signal, a clock signal and a frame synchronization signal 12.6 Timer Counter (TC) • Six 16-bit Timer Counter Channels • Wide range of functions including: – Frequency Measurement – Event Counting SAM3S16 Preliminary TDM Buses, Magnetic Card Reader) 11117AS–ATARM–12-Jul-11 ...
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... Mode to update the synchronous channels registers after a programmable number • Connection to one PDC channel – Offers Buffer transfer without Processor Intervention, to update duty cycle of • independent event lines which can send triggers on ADC within a period 11117AS–ATARM–12-Jul-11 channel of periods synchronous channels SAM3S16 Preliminary 43 ...
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... Pull-down resistor on DDM and DDP when disabled 12.10 Analog-to-Digital Converter (ADC) • Channels • 10/12-bit resolution • MSample/s • programmable sequence of conversion on each channel • Integrated temperature sensor • Single ended/differential conversion SAM3S16 Preliminary 44 11117AS–ATARM–12-Jul-11 ...
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... High speed option vs. low power option • Selectable input hysteresis: – mV • Minus input selection: – DAC outputs – Temperature Sensor – ADVREF – AD0 to AD3 ADC channels • Plus input selection: – All analog inputs 11117AS–ATARM–12-Jul-11 SAM3S16 Preliminary 45 ...
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... Interrupt on: – Rising edge, Falling edge, toggle 12.14 Cyclic Redundancy Check Calculation Unit (CRCCU) • 32-bit cyclic redundancy check automatic calculation • CRC calculation between two addresses of the memory SAM3S16 Preliminary 46 11117AS–ATARM–12-Jul-11 ...
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... Package Drawings The SAM3S16 device is available in a 100-lead LQFP package. Figure 13-1. 100-lead LQFP Package Mechanical Drawing Note : 1. This drawing is for general information only. Refer to JEDEC Drawing MS-026 for additional information. 11117AS–ATARM–12-Jul-11 SAM3S16 Preliminary 47 ...
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... Ordering Information Table 14-1. Ordering Code for SAM3S16 Device Ordering Code MRL ATSAM3S16CA-AU A SAM3S16 Preliminary 48 Flash (Kbytes) Package 1024 QFP100 Temperature Package Type Operating Range Industrial Green -40°C to 85°C 11117AS–ATARM–12-Jul-11 ...
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... Revision History Doc. Rev Comments 11117AS First issue 11117AS–ATARM–12-Jul-11 SAM3S16 Preliminary Change Request Ref. 49 ...
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... Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © 2011 Atmel Corporation. All rights reserved. Atmel trademarks or trademarks of Atmel Corporation or its subsidiaries. ARM trademarks or trademarks of ARM Ltd. Other terms and product names may be trademarks of others. Atmel Munich GmbH ...