ics650-01 Integrated Device Technology, ics650-01 Datasheet

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ics650-01

Manufacturer Part Number
ics650-01
Description
System Peripheral Clock Source
Manufacturer
Integrated Device Technology
Datasheet
14.31818 MHz
crystal
or clock
MDS 650-01 C
Integrated Circuit Systems • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • (408) 295-9818fax
Description
The ICS650-01 is a low cost, low jitter, high
performance clock synthesizer for system
peripheral applications. Using analog/digital
Phase-Locked Loop (PLL) techniques, the device
accepts a parallel resonant 14.31818 MHz crystal
input to produce up to eight output clocks. The
device provides clocks for PCI, SCSI, Fast
Ethernet, Ethernet, USB, and AC97. The user can
select one of three USB frequencies, and also one
of three AC97 audio frequencies. The OE pin puts
all outputs into a high impedance state for board
level testing. All frequencies are generated with less
than one ppm error, meeting the demands of SCSI
and Ethernet clocking.
The ICS650 can be mask customized to produce
any frequencies from 1 to 150 MHz.
Block Diagram
PSEL1:0
X2
ASEL
USEL
X1/ICLK
Oscillator
2
Crystal
Synthesis
Circuitry
Clock
1
Features
• Packaged in 20 pin tiny SSOP (QSOP)
• Operating VDD of 3.3V or 5V
• Less than one ppm synthesis error in all clocks
• Inexpensive 14.31818 MHz crystal or clock input
• Provides Ethernet and Fast Ethernet clocks
• Provides SCSI clocks
• Provides PCI clocks
• Selectable AC97 audio clock
• Selectable USB clock
• OE pin tri-states the outputs for testing
• Selectable frequencies on three clocks
• Duty cycle of 40/60
• Advanced, low power CMOS process
System Peripheral Clock Source
Output Enable (all outputs)
Output
Output
Output
Buffers
Output
Output
Buffers
Buffer
Buffer
Buffer
Revision 092799
4
Processor Clocks
(Fast Ethernet,
SCSI, PCI )
USB Clock
Audio Clock
20 MHz
14.31818 MHz
ICS650-01
Printed 11/15/00

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ics650-01 Summary of contents

Page 1

... Description The ICS650- low cost, low jitter, high performance clock synthesizer for system peripheral applications. Using analog/digital Phase-Locked Loop (PLL) techniques, the device accepts a parallel resonant 14.31818 MHz crystal input to produce up to eight output clocks. The device provides clocks for PCI, SCSI, Fast Ethernet, Ethernet, USB, and AC97 ...

Page 2

... Connect to VDD. Must be same value as other VDD. Decouple with pin 14. PCLK output number 3 per table above. PCLK output number 2 per table above. Processor Select pin #0. Determines frequencies on PCLKs 1-4 per table above. Processor Select pin #1. Determines frequencies on PCLKs 1-4 per table above. 2 ICS650-01 PCLK1 PCLK2,3 0 25.00 50.00 ...

Page 3

... Max of 10 seconds Select inputs, OE Select inputs, OE VDD=3.3V, IOH=-8mA VDD=3.3V, IOL=8mA IOH=-8mA No Load, note 2 No Load, note 2 Each output Except X1 All clocks 0.8 to 2.0V 2.0 to 0.8V At VDD/2 is the crystal load capacitance: Crystal caps (pF ICS650-01 Minimum Typical Maximum 7 -0.5 VDD+0 260 -65 150 3.0 5.5 2 0.8 2.4 ...

Page 4

... Integrated Circuit Systems • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • (408) 295-9818fax System Peripheral Clock Source 45° Marking Package ICS650R-01 20 pin SSOP ICS650R-01 20 pin SSOP ICS650R-01I 20 pin SSOP ICS650R-01I 20 pin SSOP 4 ICS650-01 20 pin SSOP Millimeters Symbol Min Max A 1.55 1.73 b 0.203 0.305 c 0.190 0.254 D 8.560 8.740 E 3 ...

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