mpc961p Integrated Device Technology, mpc961p Datasheet - Page 4

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mpc961p

Manufacturer Part Number
mpc961p
Description
Lvpecl-input Lvcmos-ouput 200-mhz Low Voltage Clock Zero Delay Buffer
Manufacturer
Integrated Device Technology
Datasheet

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IDT™ Low Voltage Zero Delay Buffer
Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc
MPC961P
Low Voltage Zero Delay Buffer
Table 6. DC Characteristics (V
1. Exceeding the specified V
2. The MPC961P is capable of driving 50 Ω transmission lines on the incident edge. Each output drives one 50 Ω parallel terminated transmission
Table 7. AC Characteristics (V
1. AC characteristics apply for parallel output termination of 50 Ω to V
2. t
3. Refer to
4. Refer to
FREESCALE SEMICONDUCTOR ADVANCED CLOCK DRIVERS DEVICE DATA
Symbol
Symbol
t
f
t
t
t
JIT(PER)
line to a termination voltage of V
t
V
REFDC
PLZ
PZL
JIT(CC)
Z
t
PD
I
f
DC
JIT(∅)
V
V
V
C
f
V
sk(O)
t
t
V
C
CCA
I
MAX
t
V
REF
CMR
OUT
I
lock
r
CC
(∅)
OH
IN
, t
PP
OL
PD
TT
IH
IL
IN
,
,
applies for V
O
HZ
LZ
f
APPLICATIONS INFORMATION
APPLICATIONS INFORMATION
Input HIGH Voltage
Input LOW Voltage
Peak-to-peak input voltage
Common Mode Range
Output HIGH Voltage
Output LOW Voltage
Output Impedance
Input Current
Input Capacitance
Power Dissipation Capacitance
Maximum PLL Supply Current
Maximum Quiescent Supply Current
Output Termination Voltage
Input Frequency
Maximum Output Frequency
Reference Input Duty Cycle
Propagation Delay
(static phase offset)
Output-to-Output Skew
Output Duty Cycle
Output Rise/Fall Time
Output Disable Time
Output Enable Time
Cycle-to-Cycle Jitter
Period Jitter
I/O Phase Jitter
Maximum PLL Lock Time
CMR
= V
CC
CMR
–1.3 V and V
2
Characteristics
Characteristics
/V
PP
TT
CC
a
CC
3
. Alternatively, the device drives up two 50 Ω series terminated transmission lines.
window results in a t
= 2.5 V ± 5%, T
= 2.5 V ± 5%, T
1
PP
RMS (1σ) F_RANGE = 0
PECL_CLK, PECL_CLK
PECL_CLK, PECL_CLK
for part-to-part skew calculation.
for calculation for other confidence factors than 1σ.
= 800 mV.
CCLK to FB_IN
F_RANGE = 0
F_RANGE = 1
F_RANGE = 0
F_RANGE = 1
F_RANGE = 0
F_RANGE = 1
F_RANGE = 1
A
A
RMS (1σ)
PD
= –40° to 85°C)
= –40° to 85°C)
RMS (1σ)
changes < 250 ps.
4
TT
.
4
Min
Min
–0.3
500
100
100
–50
1.7
1.2
1.8
1
0.1
50
50
25
40
45
V
Typ
Typ
CC
4.0
8.0
2.0
7.0
18
90
50
50
÷ 2
0.0015
0.0010
V
V
CC
CC
Max
Max
1000
±120
200
100
200
100
175
150
0.7
0.6
5.0
1.0
26
10
75
60
55
10
10
15
10
10
+ 0.3
– 0.7
·
·
T
T
Unit
Unit
MHz
MHz
mV
mA
mA
ms
µA
pF
pF
ps
ps
ns
ns
ns
ps
ps
ns
%
%
V
V
V
V
V
V
LVCMOS
LVCMOS
LVPECL
LVPECL
I
I
Per Output
V
All V
PLL locked
0.6 to 1.8 V
T = Clock Signal
Period
OH
OL
CCA
= 15 mA
= –15 mA
MPC961P
Condition
Condition
CC
Pin
Pins
NETCOM
b
2
MPC961P
495

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