mpc9855 Integrated Device Technology, mpc9855 Datasheet - Page 3

• Manufacturer Part Number: mpc9855
• Description: Xtal-input, Lvcmos Input, 8 Lvcmos Output Clock Generator
• Manufacturer: Integrated Device Technology

IDT™ Clock Generator for PowerQUICC III
Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc
MPC9855
Clock Generator for PowerQUICC III
Advanced Clock Drivers Devices
Freescale Semiconductor
Table 1. Pin Configurations
Table 2. Function Table
CLK
PCLK, PCLK
QA0, QA1,
QA2, QA3
QB0, QB1,
QB2, QB3
REF_OUT0
REF_OUT1
XTAL_IN
XTAL_OUT
CLK_SEL
XTAL_SEL
REF_33 MHz
REF_OUT1_E
MR
PLL_BYPASS
CLK_A[0:5]
CLK_B[0:5]
V
V
V
V
GND
CLK_A and CLK_B control output frequencies. See
1. PowerPC bit ordering (bit 0 = msb, bit 5 = lsb)
2. PowerPC bit ordering (bit 0 = msb, bit 5 = lsb)
DD
DDA
DDOA
DDOB
REF_OUT1_E
PLL_BYPASS
REF_33 MHz
XTAL_SEL
CLK_SEL
Control
Pin
MR
(1)
(2)
Output
Output
Output
Output
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
I/O
—
—
—
—
—
Default
LVCMOS PLL Reference Clock Input (pull-down)
LVCMOS Clock Outputs
LVCMOS Clock Outputs
LVCMOS Reference Output (25 MHz or 33 MHz)
LVCMOS Crystal Oscillator Input Pin
LVCMOS Crystal Oscillator Output Pin
LVCMOS Select between CLK and PCLK input (pull-down)
LVCMOS Select between External Input and Crystal Oscillator Input
LVCMOS Selects 33MHz input (pull-down)
LVCMOS Enables REF_OUT1 output (pull-down)
LVCMOS Master Reset (pull-up)
LVCMOS Select PLL or static test mode (pull-down)
LVCMOS Configures Bank A clock output frequency (pull-up)
LVCMOS Configures Bank B clock output frequency (pull-up)
LVPECL
0
0
0
0
0
1
Type
—
—
—
—
—
Ground
PLL reference clock input
(PCLK — pull-down, PCLK — pull-up and pull-down)
(pull-down)
3.3 V Supply
Analog Supply
Output Supply — Bank A
Output Supply — Bank B
Table 3
Selects 25 MHz Reference
for specific device configuration
Disables REF_OUT1
Normal
Reset
CLKx
CLK
0
3
Function
Selects 33 MHz Reference
Enables REF_OUT1
Bypass
Normal
Supply
V
V
PCLK
XTAL
V
V
V
V
V
V
V
DDOA
DDOB
V
V
V
V
V
V
1
—
—
—
—
—
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
Active/State
MPC9855
High
High
High
High
High
Low
—
—
—
—
—
—
—
—
—
—
—
—
—
NETCOM
MPC9855
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