sy89845u Micrel Semiconductor, sy89845u Datasheet
sy89845u
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sy89845u Summary of contents
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... General Description The SY89845U is a low jitter CML, 2:1 differential input multiplexer (MUX) optimized for redundant source switchover applications. Unlike standard multiplexers, the SY89845U unique 2:1 Runt Pulse Eliminator (RPE) MUX prevents any short cycles or “runt” pulses during switchover. In addition, a unique Fail-Safe Input protection prevents metastable ...
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Typical Application May 2005 Simplified Example Illustrating Runt Pulse Eliminator (RPE) when Primary Clock Fails 2 hbwhelp@micrel.com M9999-052405 or (408) 955-1690 ...
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... Contact factory for die availability. Dice are guaranteed Tape and Reel. Pin Configuration May 2005 Operating Type Range SY89845U with Pb-Free bar-line Industrial SY89845U with Pb-Free bar-line Industrial = 25°C, DC Electricals Only. A 24-Pin MLF™ (MLF-24) 3 Package Marking Lead Finish NiPdAu ...
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Pin Description Pin Number Pin Name 5, 2 IN0, /IN0, 23, 20 IN1, /IN1 VREF-AC0 3, 21 VREF-AC1 4, 22 VT0, VT1 VCC 13, 19, 24 Q0, / 11, 12 Q1, /Q1 15 SEL ...
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Absolute Maximum Ratings Supply Voltage (V ) ..........................–0.5V to +4.0V CC Input Voltage (V ) ..................................–0. CML Output Voltage ( OUT CC Input Current (I ) ........................................................ IN Source/Sink Current on IN, /IN ................ ...
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CML Outputs DC Electrical Characteristics V = 2.5V ±5% or 3.3V ±10 Symbol Parameter V Output HIGH Voltage Output Voltage Swing OUT Differential Output Voltage Swing DIFF-OUT Output ...
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AC Electrical Characteristics V = 2.5V ±5% or 3.3V ±10 Symbol Parameter f Maximum Operating Frequency MAX t Differential Propagation Delay pd In-to-Q In-to-Q SEL-to-Q SEL-to-Q t Differential Propagation Delay pd Tempco Temperature Coefficient t Output-to-Output Skew SKEW ...
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... Functional Description RPE MUX and Fail-Safe Input The SY89845U is optimized for clock switchover applications where switching from one clock to another clock without runt pulses (short cycles) is required. It features two unique circuits: Runt-Pulse Eliminator (RPE) Circuit The RPE MUX provides a “glitchless” switchover between two clocks and prevents any runt pulses from occurring during the switchover transition ...
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Case #2: Input Clock Failure: Switching from a selected clock stuck HIGH to a valid clock (RPE enabled). If CLK1 fails HIGH before the RPE MUX selects CLK2 (using the SEL pin), the switchover will occur in three stages. Note: ...
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Case #3: Input Clock Failure: Switching from a selected clock stuck Low to a valid clock (RPE- enabled). If CLK1 fails LOW before the RPE MUX selects CLK2 (using the SEL pin), the switchover will occur in two stages. May ...
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Case #4: Input Clock Failure: Switching from the selected clock input stuck in an undetermined state to a valid clock input (RPE-enabled). If CLK1 fails to an undetermined state (e.g., amplitude falls below the 100mV (V single-ended input limit, or ...
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... Power-On Reset (POR) Description The SY89845U includes an internal power-on reset (POR) function to ensure the RPE logic starts- known logic state once the power-supply voltage is stable. An external capacitor connected between V and the CAP pin (pin 16) controls the delay for CC the power-on reset function. ...
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Typical Operating Characteristics V = 3.3V, GND = 0V ≤ 300ps May 2005 = 100Ω across output pair 25°C, unless otherwise stated M9999-052405 hbwhelp@micrel.com or (408) 955-1690 ...
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Functional Characteristics V = 3.3V, GND = 0V, V ≥ 400mV CC IN May 2005 , t /t ≤ 300ps 100Ω across output pair 25°C, unless otherwise stated. A M9999-052405 hbwhelp@micrel.com ...
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Single-Ended and Differential Swings Figure 1a. Single-Ended Voltage Swing Input and Output Stages Figure 2a. Simplified Differential Input Stage May 2005 Figure 1b. Differential Voltage Swing Figure 2b. Simplified Differential Output Stage 15 hbwhelp@micrel.com M9999-052405 or (408) 955-1690 ...
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Input Interface Applications Figure 3a. LVPECL Interface (DC-Coupled) Figure 3d. CML Interface (AC-Coupled) May 2005 Figure 3b. LVPECL Interface (AC-Coupled) Figure 3e. LVDS Interface (DC-Coupled) 16 Option: may connect Figure 3c. CML Interface (DC-Coupled) M9999-052405 ...
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CML Output Interface Applications Figure 4a. CML DC-Coupled Termination Related Product and Support Documentation Part Number Function SY89843U Precision LVPECL Runt Pulse Eliminator 2 :1 MUX with 1:2 Fanout Buffer and Internal Termination SY89844U Precision LVDS Runt Pulse Eliminator 2 ...
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Lead MicroLeadFrame Packages Notes: 1. Package meets Level 2 Moisture Sensitivity Classification. 2. All parts are dry-packed before shipment. 3. Exposed pad must be soldered to a ground for proper thermal management. MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, ...