sy89228u Micrel Semiconductor, sy89228u Datasheet
sy89228u
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sy89228u Summary of contents
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... General Description The SY89228U is a precision, low jitter 1GHz ÷3, ÷5 clock divider with an LVPECL output. A unique Fail- Safe Input (FSI) protection prevents metastable output conditions when the input clock voltage swing drops significantly below 100mV or input is removed. The differential input includes Micrel’s unique, 3-pin ...
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... Ordering Information Part Number Package SY89228UMG MLF-16 (2) SY89228UMGTR MLF-16 Notes: 1. Contact factory for die availability. Dice are guaranteed Tape and Reel. Pin Configuration August 2007 Operating Type Range Industrial Industrial = 25°C, DC Electricals Only. A ® 16-Pin MLF (MLF-16) 2 Package Marking Finish ...
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Pin Description Pin Number Pin Name 1, 4 IN, / VREF- / VCC 12 GND, 10, 11, 14,15 Exposed Pad 16 DIV_SEL Truth Table August 2007 Pin ...
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Absolute Maximum Ratings Supply Voltage (V ) ..........................–0.5V to +4.0V CC Input Voltage (V ) ..................................–0. LVPECL Output Current (I ).................................... OUT Continuous ................................................. 50mA Surge........................................................ 100mA Current ( Source or sink current on V ...
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LVPECL Outputs DC Electrical Characteristics V = 2.5V ±5% or 3.3V ±10 Symbol Parameter V Output HIGH Voltage Output LOW Voltage Output Voltage Swing OUT Differential Output ...
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AC Electrical Characteristics V = 2.5V ±5% or 3.3V ±10 Symbol Parameter f Maximum Input Operating MAX Frequency tw Minimum Pulse Width t Differential Propagation Delay pd In-to-Q In-to-Q /MR(H-L)-to-Q t Reset Recovery Time Set-up ...
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... PK PP Maximum frequency of the SY89228U is limited by the FSI function. Refer to Figure 1b. Input Clock Failure Case If the input clock fails to a floating, static, or extremely low signal swing, the FSI function will eliminate a metastable condition and guarantee a stable output signal. No ringing and no undetermined state will occur at the output under these conditions ...
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Timing Diagrams August 2007 Figure 1a. Propagation Delay Figure 1b. Fail-Safe Feature 8 M9999-080707-A hbwhelp@micrel.com or (408) 955-1690 ...
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Figure 1c. Enable Output Timing Diagram Examples (divide by 3) August 2007 9 hbwhelp@micrel.com M9999-080707-A or (408) 955-1690 ...
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August 2007 Figure 1d. Divider Operation Timing Diagram 10 M9999-080707-A hbwhelp@micrel.com or (408) 955-1690 ...
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Typical Operating Characteristics V = 3.3V, GND = 0V 200mV August 2007 / t ≤ 300ps 50Ω –2V 25°C, unless otherwise stated. A hbwhelp@micrel.com ...
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Functional Characteristics V = 3.3V, GND = 0V 100mV Divide August 2007 /t ≤ 300ps 50Ω -2V hbwhelp@micrel.com = 25°C, ...
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Single-Ended and Differential Swings Figure 2a. Single-Ended Voltage Swing Input and Output Stages Figure 3a. Simplified Differential Input Stage August 2007 Figure 2b. Differential Voltage Swing Figure 3b. Simplified Differential Output Stage 13 hbwhelp@micrel.com M9999-080707-A or (408) 955-1690 ...
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Input Interface Applications Figure 4a. LVPECL Interface (DC-Coupled) Figure 4d. CML Interface (AC-Coupled) August 2007 Figure 4b. LVPECL Interface (AC-Coupled) Figure 4e. LVDS Interface (DC-Coupled) 14 Option: may connect Figure 4c. CML Interface (DC-Coupled) M9999-080707-A ...
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PECL Output Interface Applications PECL has high input impedance, very low output impedance (open emitter), and a small signal swing which results in low EMI. PECL is ideal for driving 50Ω- and 100Ω-controlled impedance transmission lines. There are several techniques ...
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Package Information Packages Notes: 1. Package meets Level 2 Moisture Sensitivity Classification. 2. All parts are dry-packed before shipment. 3. Exposed pad must be soldered to a ground for proper thermal management. MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA ...