sy89231u Micrel Semiconductor, sy89231u Datasheet

no-image

sy89231u

Manufacturer Part Number
sy89231u
Description
Sy89231u 3.2ghz Precision, Lvds ?3, ?5 Clock Divider
Manufacturer
Micrel Semiconductor
Datasheet
General Description
The SY89231U is a precision, low jitter 3.2GHz ÷3,
÷5 clock divider with a LVDS output. The differential
input includes Micrel’s unique, 3-pin internal
termination architecture that allows the input to
interface to any differential signal (AC- or DC-
coupled) as small as 100mV (200mV
level shifting or termination resistor networks in the
signal path. The outputs are 325mV, 100K-
compatible LVDS with fast rise/fall times guaranteed
to be less than 200ps.
The SY89231U operates from a 2.5V ±5% supply
and is guaranteed over the full industrial
temperature range of –40°C to +85°C. The
SY89231U is part of Micrel’s high-speed, Precision
Edge
All support documentation can be found on Micrel’s
web site at: www.micrel.com.
Block Diagram
November 2007
Precision Edge is a registered trademark of Micrel, Inc.
MLF and MicroLeadFrame are registered trademarks of Amkor Technology.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
®
product line.
PP
) without any
Features
• Accepts a high-speed input and provides a precision
• Guaranteed AC performance over temperature and
• Ultra-low jitter design:
• Unique patented internal termination and VT pin
• Wide input voltage range V
• 325mV LVDS output
• 45% to 55% Duty Cycle (÷ 3)
• 47% to 53% Duty Cycle (÷ 5)
• 2.5V ±5% supply voltage
• -40°C to +85°C industrial temperature range
• Available in 16-pin (3mm x 3mm) MLF
Applications
• Fail-safe clock protection
Markets
• LAN/WAN
• Enterprise servers
• ATE
• Test and measurement
3.2GHz Precision, LVDS ÷3, ÷5 Clock Divider
÷3 and ÷5 sub-rate, LVDS output
supply voltage:
– <810ps Propagation Delay (In-to-Q)
– <200ps Rise/Fall times
– <1ps
– <1ps
– <10ps
– <0.7ps
accepts DC- and AC-coupled inputs (CML, PECL,
LVDS)
DC-to >3.2GHz throughput
RMS
RMS
PP
RMS
total jitter (clock)
random jitter
cycle-to-cycle jitter
MUX crosstalk induced jitter
SY89231U
hbwhelp@micrel.com
CC
to GND
®
Precision Edge
or (408) 955-1690
package
M9999-110507-A
®

Related parts for sy89231u

sy89231u Summary of contents

Page 1

... General Description The SY89231U is a precision, low jitter 3.2GHz ÷3, ÷5 clock divider with a LVDS output. The differential input includes Micrel’s unique, 3-pin internal termination architecture that allows the input to interface to any differential signal (AC- or DC- coupled) as small as 100mV (200mV level shifting or termination resistor networks in the signal path ...

Page 2

... Ordering Information Part Number Package SY89231UMG MLF-16 (2) SY89231UMGTR MLF-16 Notes: 1. Contact factory for die availability. Dice are guaranteed Tape and Reel. Pin Configuration November 2007 Operating Type Range Industrial Industrial = 25°C, DC Electricals Only. A 16-Pin MLF 2 Package Marking 231U with Pb-Free bar-line Indicator ...

Page 3

Pin Description Pin Number Pin Name 1, 4 IN, / VREF- / VCC 12 GND, 10, 11, 14,15 Exposed Pad 16 DIV_SEL Truth Table November 2007 Pin ...

Page 4

Absolute Maximum Ratings Supply Voltage (V ) ............................ –0.5V to +4.0V CC Input Voltage (V ) ....................................–0. LVPECL Output Current (I )...……………....±10mA OUT Current ( Source or sink current Input Current Source ...

Page 5

LVDS Outputs DC Electrical Characteristics V = +2.5V ±5 100_ across the outputs Symbol Parameter V Output Voltage Swing (Q, /Q) OUT V Differential Output Voltage Swing |Q – /Q| DIFF_OUT V Output Common Mode ...

Page 6

AC Electrical Characteristics V = 2.5V ±5 100Ω across the outputs Symbol Parameter f Maximum Input Operating MAX Frequency tw Minimum Pulse Width t Differential Propagation Delay pd In-to-Q /MR(H-L)-to-Q t Reset Recovery Time RR ...

Page 7

Functional Description Output Duty Cycle Equation For a non 50% input, derate the spec by: Divide 100 (0 x100 Divide 100 (0 x100, ...

Page 8

Timing Diagrams November 2007 Figure 1a. Propagation Delay 8 M9999-110507-A hbwhelp@micrel.com or (408) 955-1690 ...

Page 9

Figure 1b. Enable Output Timing Diagram Examples (divide by 3) November 2007 9 hbwhelp@micrel.com M9999-110507-A or (408) 955-1690 ...

Page 10

November 2007 Figure 1c. Divider Operation Timing Diagram 10 M9999-110507-A hbwhelp@micrel.com or (408) 955-1690 ...

Page 11

Typical Operating Characteristics V = 2.5V, GND = 0V ≤ 300ps Functional Characteristics V = 2.5V, GND = 0V 350mV Divide stated. November 2007 ...

Page 12

Single-Ended and Differential Swings Figure 2a. Single-Ended Voltage Swing Input Stage November 2007 Figure 3. Simplified Differential Input Stage 12 Figure 2b. Differential Voltage Swing M9999-110507-A hbwhelp@micrel.com or (408) 955-1690 ...

Page 13

Input Interface Applications Figure 4a. LVPECL Interface (DC-Coupled) Figure 4d. CML Interface (AC-Coupled) November 2007 Figure 4b. LVPECL Interface (AC-Coupled) Figure 4e. LVDS Interface (DC-Coupled) 13 Option: may connect Figure 4c. CML Interface (DC-Coupled) M9999-110507-A ...

Page 14

LVDS Output Interface Applications LVDS specifies a small swing of 325mV typical nominal 1.2V common mode above ground. The common mode voltage has tight limits to permit large variations in the ground between and LVDS driver and receiver. ...

Page 15

Package Information Packages Notes: 1. Package meets Level 2 Moisture Sensitivity Classification. 2. All parts are dry-packed before shipment. 3. Exposed pad must be soldered to a ground for proper thermal management. MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA ...

Related keywords