sy89230u Micrel Semiconductor, sy89230u Datasheet
sy89230u
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sy89230u Summary of contents
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... General Description The SY89230U is a precision, low jitter 3.2GHz ÷3, ÷5 clock divider with a LVPECL output. The differential input includes Micrel’s unique, 3-pin internal termination architecture that allows the input to interface to any differential signal (AC- or DC- coupled) as small as 100mV (200mV level shifting or termination resistor networks in the signal path ...
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... Ordering Information Part Number Package SY89230UMG MLF-16 (2) SY89230UMGTR MLF-16 Notes: 1. Contact factory for die availability. Dice are guaranteed Tape and Reel. Pin Configuration November 2007 Operating Type Range Industrial Industrial = 25°C, DC Electricals Only. A 16-Pin MLF 2 Package Marking 230U with Pb-Free bar-line Indicator ...
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Pin Description Pin Number Pin Name 1, 4 IN, / VREF- / VCC 12 GND, 10, 11, 14,15 Exposed Pad 16 DIV_SEL Truth Table November 2007 Pin ...
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Absolute Maximum Ratings Supply Voltage (V ) ............................ –0.5V to +4.0V CC Input Voltage (V ) ....................................–0. LVPECL Output Current (I ) ...................................... OUT Continuous .................................................... 50mA Surge ........................................................... 100mA Current ( Source or sink ...
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LVPECL Outputs DC Electrical Characteristics V = 2.5V ±5% or 3.3V ±10 Symbol Parameter V Output HIGH Voltage Output LOW Voltage Output Voltage Swing OUT Differential Output ...
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AC Electrical Characteristics V = 2.5V ±5% or 3.3V ±10 Symbol Parameter f Maximum Input Operating MAX Frequency tw Minimum Pulse Width t Differential Propagation Delay pd In-to-Q /MR(H-L)-to-Q t Reset Recovery Time Set-up Time ...
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Functional Description Output Duty Cycle Equation For a non 50% input, derate the spec by: Divide 100 (0 x100 Divide 100 (0 x100, ...
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Timing Diagrams November 2007 Figure 1a. Propagation Delay 8 M9999-110507-A hbwhelp@micrel.com or (408) 955-1690 ...
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Figure 1b. Enable Output Timing Diagram Examples (divide by 3) November 2007 9 hbwhelp@micrel.com M9999-110507-A or (408) 955-1690 ...
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November 2007 Figure 1c. Divider Operation Timing Diagram 10 M9999-110507-A hbwhelp@micrel.com or (408) 955-1690 ...
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Typical Operating Characteristics V = 3.3V, GND = 0V ≤ 300ps Functional Characteristics V = 2.5V, GND = 0V 100mV Divide November 2007 = ...
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Single-Ended and Differential Swings Figure 2a. Single-Ended Voltage Swing Input and Output Stages Figure 3a. Simplified Differential Input Stage November 2007 Figure 2b. Differential Voltage Swing Figure 3b. Simplified Differential Output Stage 12 hbwhelp@micrel.com M9999-110507-A or (408) 955-1690 ...
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Input Interface Applications Figure 4a. LVPECL Interface (DC-Coupled) Figure 4d. CML Interface (AC-Coupled) November 2007 Figure 4b. LVPECL Interface (AC-Coupled) Figure 4e. LVDS Interface (DC-Coupled) 13 Option: may connect Figure 4c. CML Interface (DC-Coupled) M9999-110507-A ...
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PECL Output Interface Applications PECL has a high input impedance, a very low output impedance (open emitter), and a small signal swing which results in low EMI. PECL is ideal for driving 50Ω- and 100Ω-controlled impedance transmission lines. There are ...
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Package Information MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http:/www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no ...