sy89473u Micrel Semiconductor, sy89473u Datasheet - Page 3

• Manufacturer Part Number: sy89473u
• Description: Sy89473u Precision Lvpecl 2 1 Multiplexer With 1 2 Fanout And Internal Termination
• Manufacturer: Micrel Semiconductor

Pin Description
Truth Table
May 2007
1, 6, 9, 10, 13,
Pin Number
14, 17, 18
23, 20
19, 24
11, 12
3, 21
4, 22
5, 2,
7, 8
15
GND, Exposed
VREF-AC0
VREF-AC1
Pin Name
VT0
IN0, /IN0
IN1, /IN1
Q0, /Q0
Q1, /Q1
VCC
SEL
Pad
,
VT1
IN0
X
X
0
1
,
/IN0
X
X
1
0
Pin Function
Differential Inputs: These input pairs are the differential signal inputs to the device.
They accept AC or DC-coupled signals as small as 100mV (200mV
these inputs will default to an indeterminate state if left open. Each pin of a pair
internally terminates to a VT pin through 50Ω. Please refer to the “Input Interface
Applications” section for more details.
Reference Voltage: These outputs bias to V
coupling inputs IN and /IN. Connect VREF-AC directly to the corresponding VT pin.
Bypass with 0.01µF low ESR capacitor to VCC. Maximum sink/source current is
±1.5mA. Due to the limited drive capability, the VREF-AC pin is only intended to
drive its respective VT pin. Please refer to the “Input Interface Applications” section
for more details.
Input Termination Center-Tap: Each side of the differential input pair terminates to
a VT pin. The VT0 and VT1 pins provide a center-tap to a termination network for
maximum interface flexibility. Please refer to the “Input Interface Applications”
section for more details.
Positive Power Supply: Connect to +2.5V or +3.3V power supply. Bypass with
0.1µF//0.01µF low ESR capacitors as close to VCC pins as possible.
Differential Outputs: These differential LVPECL output pairs are a logic function of
the IN0, IN1, and SEL inputs. Please refer to the truth table below for details.
Unused output pairs can be left floating with no impact on jitter.
This single-ended TTL/CMOS-compatible input selects the inputs to the
multiplexer. Note that this input is internally connected to a 25kΩ pull-up resistor
and will default to a logic HIGH state if left open. V
“Timing Diagram” section for more details.
Ground: Ground pins and exposed pad must be connected to the same ground
plane.
INPUTS
IN1
X
X
0
1
/IN1
X
X
1
0
3
SEL
0
0
1
1
OUTPUTS
Q
0
1
0
1
CC
[e-mail]
/Q
1
0
1
0
-1.2V. They are used for AC-
TH
= V
CC
/2. Please refer to the
or [phone]
M9999-052207-B
PP
). Note that