lmk01000 National Semiconductor Corporation, lmk01000 Datasheet
lmk01000
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lmk01000 Summary of contents
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... MHz) ■ Dual clock inputs ■ Programmable output channels (0 to 1600 MHz) — LMK01000: 3 LVDS outputs (CLKout0 - CLKout2 LVPECL outputs (CLKout3 - CLKout7) — LMK01010: 8 LVDS outputs — LMK01020: 8 LVPECL outputs — Channel divider values 510 (even divides) — ...
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Functional Block Diagram Connection Diagram www.national.com 48-Pin LLP Package 2 30042801 30042802 ...
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... DAP The LMK01000 family is footprint compatible with the LMK03000/02000 family of devices. All CLKout pins are pin-to-pin compatible, and CLKin0 and CLKin1 are equivalent to OSCin and Fin, respectively . Pin Name I/O GND - CLKuWire I ...
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... JA 27.4° C/W (Note 4) ≤ 85 °C, Differential Inputs/Outputs; except as specified. Typical values represent most likely = 25 °C, and at the Recommended Operation Conditions at the time of product characterization Conditions Current Consumption All outputs LMK01000 enabled, no LMK01010 divide or delay ( CLKoutX_MUX LMK01020 = Bypassed ) LVDS Per channel, no divide or delay ...
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Symbol Parameter Delay Maximum Allowable Delay(Note 8) CLKout Allowable divide range. (Note that 1 is Divide CLKoutX the only allowable odd divide value) Jitter Additive RMS Jitter (Note 7) ADD Noise Floor Divider Noise Floor(Note 7) t CLKoutX to CLKoutY ...
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Symbol Parameter Jitter Additive RMS Jitter(Note 7) ADD Noise Floor Divider Noise Floor(Note 7) t CLKoutX to CLKoutY (Note 8) SKEW V Output High Voltage OH V Output Low Voltage OL V Differential Output Voltage OD V High-Level Input Voltage ...
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Symbol Parameter V High-Level Input Voltage IH V Low-Level Input Voltage IL I High-Level Input Current IH I Low-Level Input Current IL t Data to Clock Set Up Time CS t Data to Clock Hold Time CH t Clock Pulse ...
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Typical Performance Characteristics LVDS Single-Ended Peak to Peak Voltage LVDS Output Noise Floor Delay Noise Floor (Adds to Output Noise Floor) www.national.com LVPECL Single-Ended Peak to Peak Voltage 30042807 LVPECL Output Noise Floor 30042809 30042811 8 30042808 30042810 ...
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... If the SYNC* function is not used, clock output synchronization is not guaranteed. 1.6 CONNECTION TO LVDS OUTPUTS LMK01000/10 LVDS outputs can be connected coupling configurations; however coupling configura- tion, proper conditions must be presented by the LVDS re- ceiver. To ensure such conditions, we recommend the usage of LVDS receivers without fail-safe or internal input bias such as DS90LV110T ...
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... General Programming Information The LMK01000/LMK01010/LMK01020 grammed using several 32-bit registers which control the device's operation. The registers consist of a data field and an address field. The last 4 register bits, ADDR[3:0] form the address field. The remaining 28 bits form the data field DATA [27:0] ...
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CLKout0 CLKout1 CLKout2 _EN _EN _EN RESET Register CLKout3 CLKout4 CLKout5 CLKout6 _EN _EN _EN _EN 11 CLKout7 _EN POWERDOWN EN_CLKout _Global CLKin _SELECT www.national.com ...
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REGISTER Registers R0 through R7 control the eight clock outputs. Reg- ister R0 controls CLKout0, Register R1 controls CLKout1, and so on. There is one additional bit in register R0 called RESET. Default Bit Name Bit ...
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... GOE pin = High / No 1 Connect 1 2.4 REGISTER R9 and R14 The LMK01000 family requires register R14 to be pro- grammed as shown in the register map (see 2.2). R9 only needs to be programmed if Vboost is set to 1. 2.4.1 Vboost - Voltage Boost Bit Enabling this bit sets all clock outputs in voltage boost mode which increases the voltage at these outputs ...
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... Application Information 3.1 SYSTEM LEVEL DIAGRAM The following shows the LMK01000LMK01010/LMK01020 in a typical application. In this setup the clock may be divided, skewed, and redistributed. www.national.com FIGURE 1. Typical Application 14 30042870 ...
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... LVPECL outputs emitter resistors are connected to the LVPECL outputs, this power will be 0 watts. For example, in the case of 1 LVDS (CLKout0) & 1 LVPECL (CLKout4) op- erating at 3.3 volts for LMK01000, we calculate 3.3 V × ( 17 3.3 V × 85 283.1 mW. Because the LVPECL output (CLKout4) has the emitter resistors hooked up and the power dissipated by these resistors is 60 mW, the total power dissipation is 283 ...
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... THERMAL MANAGEMENT Power consumption of the LMK01000/LMK01010/LMK01020 can be high enough to require attention to thermal manage- ment. For reliability and performance reasons the die tem- perature should be limited to a maximum of 125 °C. That is estimate, T (ambient temperature) plus device power A consumption times θ should not exceed 125 °C. ...
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... Physical Dimensions inches (millimeters) unless otherwise noted Order Number Package Marking LMK01000ISQ K01000 I LMK01000ISQX K01000 I LMK01010ISQ K01010 I LMK01010ISQX K01010 I LMK01020ISQ K01020 I LMK01020ISQX K01020 I Leadless Leadframe Package (Bottom View) 48 Pin LLP (SQA48A) Package Packing 250 Unit Tape and Reel 2500 Unit Tape and Reel ...
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... National Semiconductor and the National Semiconductor logo are registered trademarks of National Semiconductor Corporation. All other brand or product names may be trademarks or registered trademarks of their respective holders. ...