max9178eue-t Maxim Integrated Products, Inc., max9178eue-t Datasheet
max9178eue-t
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max9178eue-t Summary of contents
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... Pin Compatible with DS90LV047A and MAX9123 o Guaranteed 400Mbps Data Rate o Single-Ended Inputs Tolerate 1V Overshoot/Undershoot o 250ps Maximum Pulse Skew o IEC 61000-4-2 Level 4 ESD Tolerance on LVDS Outputs o Conforms to ANSI TIA/EIA-644 LVDS Standard o Single +3.3V Supply PART Applications MAX9178EUE MAX9178ETE *EP = Exposed pad. LVTTL/CMOS DATA INPUT OUT2+ 12 OUT2- ...
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Quad LVDS Line Driver with High-ESD Tolerance and Flow-Through Pinout ABSOLUTE MAXIMUM RATINGS V to GND ...........................................................-0.3V to +4.0V CC IN_, EN GND....................................-1. OUT_ to GND ........................................................-0.3V to +4.0V Short-Circuit Duration (OUT_) ....................................Continuous Continuous Power Dissipation ...
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Quad LVDS Line Driver with High-ESD Tolerance and Flow-Through Pinout DC ELECTRICAL CHARACTERISTICS (continued) = 100Ω ±1%, IN_ = high or low high low +3.0V to +3.6V +3.3V ...
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Quad LVDS Line Driver with High-ESD Tolerance and Flow-Through Pinout SWITCHING CHARACTERISTICS (continued +3.0V to +3.6V 100Ω ±1 otherwise noted.) (Notes 4–7) Note 7: Pulse generator output for t PHZ R = 50Ω, ...
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Quad LVDS Line Driver with High-ESD Tolerance and Flow-Through Pinout (V = +3.3V 100Ω 15pF DIFFERENTIAL OUTPUT VOLTAGE vs. LOAD RESISTOR 600 500 400 300 200 100 ...
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Quad LVDS Line Driver with High-ESD Tolerance and Flow-Through Pinout (V = +3.3V 100Ω 15pF TRANSITION TIME vs. SUPPLY VOLTAGE 550 FREQUENCY = 200MHz 500 450 400 350 300 3.0 3.1 ...
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Quad LVDS Line Driver with High-ESD Tolerance and Flow-Through Pinout IN_ - Figure 1. Driver V and V Test Circuit OD OS IN_ OUT_- OUT_+ V DIFF Figure 3. Transition ...
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Quad LVDS Line Driver with High-ESD Tolerance and Flow-Through Pinout EN WHEN EN = LOW OR OPEN OUT_+ WHEN IN_ = OUT_- WHEN IN_ = -1V TO 0.8V OUT_+ WHEN IN_ = -1V TO 0.8V OUT_- WHEN ...
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Quad LVDS Line Driver with High-ESD Tolerance and Flow-Through Pinout Detailed Description The LVDS interface standard is a signaling method intended for point-to-point communication over a con- trolled-impedance medium as defined by the ANSI/TIA/EIA-644 and IEEE 1596.3 standards. The LVDS ...
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Quad LVDS Line Driver with High-ESD Tolerance and Flow-Through Pinout Maintain the distance between the differential traces to avoid discontinuities in differential impedance. Minimize the number of vias to further prevent imped- ance discontinuities. Cables and Connectors Transmission media should ...
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Quad LVDS Line Driver with High-ESD Tolerance and Flow-Through Pinout Functional Diagram OUT1+ IN1 OUT1- OUT2+ IN2 OUT2- OUT3+ IN3 OUT3- OUT4+ IN4 OUT4 ______________________________________________________________________________________ Chip Information TRANSISTOR COUNT: 1089 PROCESS: CMOS 11 ...
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Quad LVDS Line Driver with High-ESD Tolerance and Flow-Through Pinout (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) 12 ______________________________________________________________________________________ Package Information PACKAGE OUTLINE 12,16,20,24L ...
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Quad LVDS Line Driver with High-ESD Tolerance and Flow-Through Pinout (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) ______________________________________________________________________________________ Package Information (continued) PACKAGE OUTLINE 12,16,20,24L ...
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Quad LVDS Line Driver with High-ESD Tolerance and Flow-Through Pinout (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) Maxim cannot assume responsibility for use of ...