max9326eti Maxim Integrated Products, Inc., max9326eti Datasheet

max9326eti

Manufacturer Part Number

max9326eti

Description

Max9326 1 9 Differential Lvpecl/lvecl/hstl Clock And Data Driver

Manufacturer

Maxim Integrated Products, Inc.

Datasheet

1.MAX9326ETI.pdf (12 pages)

Current page: 1 of 12
Download datasheet (311Kb)

The MAX9326 low-skew, 1:9 differential driver features

extremely low output-to-output skew (50ps max) and

part-to-part skew (225ps max). These features make

the device ideal for clock and data distribution across a

backplane or board. The device repeats an HSTL or

LVECL/LVPECL differential input at nine differential out-

puts. Outputs are compatible with LVECL and LVPECL,

and directly drive 50Ω terminated transmission lines.

The differential inputs can be configured to accept a

single-ended signal when the unused complementary

input is connected to the on-chip reference output volt-

age V

ensure differential low default outputs when the inputs

are left open or at V

The MAX9326 operates over a +2.375V to +3.8V supply

range for interfacing to differential HSTL and LVPECL

signals. This allows high-performance clock or data dis-

tribution in systems with a nominal +2.5V or +3.3V sup-

ply. For LVECL operation, the device operates with a

-2.375V to -3.8V supply.

The MAX9326 is offered in 28-lead PLCC and space-

saving 28-lead QFN packages. The MAX9326 is speci-

fied for operation from -40°C to +85°C.

19-2538; Rev 2; 10/02

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

EE.

1:9 Differential LVPECL/LVECL/HSTL Clock and

The internal pulldowns and a fail-safe circuit

BB.

Precision Clock Distribution

Low-Jitter Data Repeaters

All inputs have internal pulldown resistors to

________________________________________________________________ Maxim Integrated Products

TOP VIEW

N.C.

CLK

General Description

Applications

MAX9326

PLCC

*CORNER PINS AND EXPOSED PAD ARE CONNECTED TO V

N.C.

CLK

N.C.

o 50ps (max) Output-to-Output Skew

o 1.5ps

o Guaranteed 300mV Differential Output at 1.0GHz

o +2.375V to +3.8V Supplies for Differential

o -2.375V to -3.8V Supplies for Differential LVECL

o On-Chip Reference for Single-Ended Inputs

o Outputs Low for Inputs Open or at V

o Pin Compatible with MC100LVE111

Functional Diagram appears at end of data sheet.

MAX9326EQI

MAX9326EGI

HSTL/LVPECL

PART

RMS

MAX9326

(max) Random Jitter

QFN*

-40°C to +85°C

TEMP RANGE

Ordering Information

Pin Configurations

Data Driver

PIN-PACKAGE

28 PLCC

28 QFN 5mm x 5mm

Features

Related parts for max9326eti

max9326eti Summary of contents

Page 1

Rev 2; 10/02 1:9 Differential LVPECL/LVECL/HSTL Clock and General Description The MAX9326 low-skew, 1:9 differential driver features extremely low output-to-output skew (50ps max) and part-to-part skew (225ps max). These features make the device ideal for clock and data distribution ...

Page 2

Differential LVPECL/LVECL/HSTL Clock and Data Driver ABSOLUTE MAXIMUM RATINGS ...............................................................-0.3V to +4. Inputs (CLK, CLK ...........................-0. CLK to CLK ........................................................................±3.0V Continuous Output Current .................................................50mA Surge Output Current........................................................100mA V Sink/Source ...

Page 3

Differential LVPECL/LVECL/HSTL Clock and DC ELECTRICAL CHARACTERISTICS (continued) = 50Ω ± (( 2.375V to 3.8V 1.5V).) (Notes 1–4) PARAMETER SYMBOL CONDITIONS OUTPUT (Q_ ...

Page 4

Differential LVPECL/LVECL/HSTL Clock and Data Driver AC ELECTRICAL CHARACTERISTICS–PLCC Package = 50Ω ± (( 2.375V to 3.8V are 3.3V V(V - ...

Page 5

Differential LVPECL/LVECL/HSTL Clock and AC ELECTRICAL CHARACTERISTICS–QFN Package = 50Ω ± (( 2.375V to 3.8V are 3.3V V ...

Page 6

Differential LVPECL/LVECL/HSTL Clock and Data Driver (PLCC package, typical values are at (V 500MHz, input transition time = 125ps (20% to 80%).) SUPPLY CURRENT (I vs. TEMPERATURE -40 -15 10 TEMPERATURE (°C) ...

Page 7

Differential LVPECL/LVECL/HSTL Clock and PIN NAME PLCC QFN 11, 18 CLK N. ...

Page 8

Differential LVPECL/LVECL/HSTL Clock and Data Driver IHD ILD IHD ILD V EE DIFFERENTIAL INPUT VOLTAGE DEFINITION Figure 1. Input Voltage Definitions CLK CLK Q_ Q_ DIFFERENTIAL OUTPUT WAVEFORM ...

Page 9

Differential LVPECL/LVECL/HSTL Clock and CLK WHEN CLK = CLK WHEN CLK = Figure 3. Single-Ended Input (CLK, CLK ) to Output (Q_ Delay Timing Diagram Detailed Description The MAX9326 low-skew, ...

Page 10

Differential LVPECL/LVECL/HSTL Clock and Data Driver When configuring a differential input as a single-ended input, a user must ensure that the supply voltage ( greater than 2.58V. This is because the input high EE minimum level ...

Page 11

Differential LVPECL/LVECL/HSTL Clock and (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/packages NOTES: ...

Page 12

Differential LVPECL/LVECL/HSTL Clock and Data Driver (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/packages.) Maxim cannot assume responsibility for use of any circuitry other ...

Related keywords

max9326eti datasheet
max9326eti data sheet
max9326eti pdf datasheet
max9326eti component
max9326eti part
max9326eti distributor
max9326eti RoHS
max9326eti datasheet download