sky73134-11 Skyworks Solutions, Inc., sky73134-11 Datasheet - Page 6

• Manufacturer Part Number: sky73134-11
• Description: Sky73134-11 Wideband Pll Frequency Synthesizer
• Manufacturer: Skyworks Solutions, Inc.

PRELIMINARY DATA SHEET • SKY73134-11 FREQUENCY SYNTHESIZER
PLL Control Registers (R-Divider and N-Divider)
There are three digital PLL control registers that are used to store
the R-divider and N-divider values: R_DIV, N_DIV1, and N_DIV2.
By default, all registers are 25 bits wide. Bit[21] is the read/write
bit, cleared when writing to the device. Bits[20:16] are the
address bits of the registers. The 16 least significant bits (LSBs)
represent the data bits.
Three values are needed to calculate the three PLL dividers,
R_DIV, N_DIV1 and N_DIV2: the desired frequency (F
divider (D), and the frequency step size (F
The VCO frequency (F
is defined by the product of the desired frequency (F
VCO divider, D:
The VCO divider (equal to 1, 2, 3, 4, or 8) is chosen so that the
product of F
The frequency step size (F
and D, the comparison frequency (F
The R_DIV register stores the value of the 11-bit R-divider that
produces the desired comparison frequency (F
according to the following equation:
Where F
The N_DIV1 and N_DIV2 registers store the value of the N-divider
according to the following equation:
6
REF
is the reference frequency provided to the device.
RF
Note: Value of bits [15:11] can vary. Refer to SKY73134-11 Frequency Synthesizer Programming Guide, document number *** TBD ***
24
3-Bit Device
× D is within the specified VCO range.
0
Address
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [e-mail] • www.skyworksinc.com
23
1-Bit Read/Write Flag
1
July 7, 2010 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201199C
VCO
22
1
F
) has a range of 2.8 GHz to 6.0 GHz, and
F
COMP
N
VCO
STEP
21
R 
0

) is a user defined value. Given F


F
F
20
F
VCO
0
REF
F
F
F
COMP
STEP
RF
REF
COMP
19
5-Bit Register

0


Address
R
Figure 5. R_DIV Register Showing an R-Divider Value of 192
D
) can be calculated by:
18
D
1
STEP
).
17
0
COMP
16
0
) for the RF PLL
RF
RF
) and the
), the VCO
15
x
14
x
STEP
(1)
(2)
(3)
(4)
13
x
12
x
Bits[1:0] of the N_DIV2 register are the most significant bits
(MSBs) of the 18-bit representation of the N number.
Bits[15:0] of the N_DIV1 register are the LSBs of the 18-bit binary
representation of the N number.
The calculated R-divider and N-divider values are programmed
into the SKY73134-11 using the SPI interface.
Additional programming information is provided in the document,
Skyworks Wideband Integer-N, Phase-Locked Loop Programming
Guide, document number 201322.
Example:
A desired RF output frequency of 2000 MHz is required using a
reference frequency of 38.4 MHz and a desired frequency step
size of 100 kHz. If the VCO divider is equal to 2, the VCO
frequency is 4000 MHz from Equation 1 and the comparison
frequency is equal to 200 kHz from Equation 2.
From Equations 3 and 4, the R and N values become:
R = 192 = 11000000b
N = 20000 = 100111000100000b
These values would be programmed through the SPI interface.
Figure 5 represents the bits of the R_DIV register with the value of
R = 192. Figures 6 and 7 represent the bits of the N_DIV1 and
N_DIV2 registers, respectively, with the value of N = 20000.
Electrical and Mechanical Specifications
The absolute maximum ratings of the SKY73134-11 are provided
in Table 3. The recommended operating conditions are specified
in Table 4 and electrical specifications are provided in Tables 5
through 7.
11 10
x
16-Bit R-Divider Value
0
9
0
0
8
7
1
6
1
0
5
0
4
0
3
0
2
1
0
S1847
0
0