max5100aeupt Maxim Integrated Products, Inc., max5100aeupt Datasheet

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max5100aeupt

Manufacturer Part Number
max5100aeupt
Description
Max5100 +2.7v To +5.5v, Low-power, Quad, Parallel 8-bit Dac With Rail-to-rail Voltage Outputs
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
The MAX5100 parallel-input, voltage-output, quad 8-bit
digital-to-analog converter (DAC) operates from a sin-
gle +2.7V to +5.5V supply and comes in a space-sav-
ing 20-pin TSSOP package. Internal precision buffers
swing Rail-to-Rail
includes both ground and the positive rail. All four
DACs share a common reference input.
The MAX5100 provides double-buffered logic inputs:
four 8-bit buffer registers followed by four 8-bit DAC
registers. This keeps the DAC outputs from changing
during the write operation. An asynchronous control
pin, LDAC, allows for simultaneous updating of the
DAC registers.
The MAX5100 features a shutdown mode that reduces
current to 1nA, as well as a power-on reset mode that
resets all registers to code 00 hex on power-up.
19-1557; Rev 0; 10/99
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.
Digital Gain and Offset Adjustments
Programmable Attenuators
Portable Instruments
Power-Amp Bias Control
8-Bit DAC with Rail-to-Rail Voltage Outputs
+2.7V to +5.5V, Low-Power, Quad, Parallel
________________________________________________________________ Maxim Integrated Products
®
, and the reference input range
General Description
Applications
o +2.7V to +5.5V Single-Supply Operation
o Ultra-Low Supply Current
o Ultra-Small 20-Pin TSSOP Package
o Ground to V
o Output Buffer Amplifiers Swing Rail-to-Rail
o Double-Buffered Registers for Synchronous
o Power-On Reset Sets All Registers to Zero
MAX5100AEUP
MAX5100BEUP
Updating
TOP VIEW
0.4mA while Operating
1nA in Shutdown Mode
PART
SHDN
OUTB
OUTA
V
REF
WR
DD
D7
D6
D5
D4
DD
TEMP. RANGE
-40°C to +85°C
-40°C to +85°C
10
Reference Input Range
1
2
3
4
5
6
7
8
9
Ordering Information
MAX5100
TSSOP
Pin Configuration
20 TSSOP
20 TSSOP
PIN-PACKAGE
20
19
18
17
16
15
14
13
12
11
OUTC
OUTD
GND
A0
A1
LDAC
D0
D1
D2
D3
Features
(LSB)
INL
±1
±2
1

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max5100aeupt Summary of contents

Page 1

Rev 0; 10/99 +2.7V to +5.5V, Low-Power, Quad, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs General Description The MAX5100 parallel-input, voltage-output, quad 8-bit digital-to-analog converter (DAC) operates from a sin- gle +2.7V to +5.5V supply and comes in a ...

Page 2

Low-Power, Quad, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs ABSOLUTE MAXIMUM RATINGS V to GND ..............................................................-0.3V to +6V DD D_, A_, WR, SHDN, LDAC to GND...........................-0.3V to +6V REF to GND ................................................-0. OUT_ to GND ...

Page 3

Low-Power, Quad, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs ELECTRICAL CHARACTERISTICS (continued +2.7V to +5.5V 10kΩ REF L = +3V and T = +25°C.) A PARAMETER SYMBOL DYNAMIC PERFORMANCE ...

Page 4

Low-Power, Quad, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs ADDRESS LDAC (NOTE 8) DATA Figure 1. Timing Diagram ( +3V 10kΩ 100pF, code = FF hex, T ...

Page 5

Low-Power, Quad, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs ( +3V 10kΩ 100pF, code = FF hex REF L L TOTAL HARMONIC DISTORTION PLUS NOISE AT DAC OUTPUT ...

Page 6

Low-Power, Quad, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs PIN NAME 1 OUTB DAC B Voltage Output 2 OUTA DAC A Voltage Output 3 V Positive Supply Voltage. Bypass REF Reference Voltage Input 5 ...

Page 7

Low-Power, Quad, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs D0– Figure 2. Functional Diagram Table 1. MAX5100 Address Table (Partial) LDAC LATCH STATE Input and DAC data latched ...

Page 8

Low-Power, Quad, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are Maxim cannot assume responsibility for ...

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