max5115eept Maxim Integrated Products, Inc., max5115eept Datasheet - Page 4

• Manufacturer Part Number: max5115eept
• Description: Nonvolatile, Quad, 8-bit Dacs With 2-wire Serial Interface
• Manufacturer: Maxim Integrated Products, Inc.

Nonvolatile, Quad, 8-Bit DACs with 2-Wire Serial
Interface
ELECTRICAL CHARACTERISTICS (continued)
(V
noted. Typical values are at V
4
Note 1: All devices are 100% production tested at T
Note 2: Guaranteed monotonic.
Note 3: Gain error is defined as:
Note 4: The device draws higher supply current when the digital inputs are driven with voltages between (V
Note 5: Output settling time is measured from the 50% point of the rising edge of the last SCL of the data byte to 0.5 LSB of OUT_’s
Note 6: Crosstalk is defined as the coupling from a DAC switching from code 00 hex to code FF hex to any other DAC that is in a
Note 7: Reference feedthrough is defined as the coupling from one driven reference with input code = FF hex to any other DAC
Note 8: SCL clock period includes rise and fall times t
Note 9: An appropriate bus pullup resistance must be selected depending on board capacitance. Refer to the document linked to
Note 10: The busy time begins from the initiation of the stop pulse.
DIGITAL TIMING (Figure 4, Note 8)
SCL Clock Frequency
Setup Time for START Condition
Hold Time for START Condition
SCL High Time
SCL Low Time
Data Setup Time
Data Hold Time
SDA, SCL Rise Time
SDA, SCL Fall Time
Setup Time for STOP Condition
Bus Free Time Between a STOP
and START Condition
Pulse Width of Spike Suppressed
Maximum Capacitive Load for
Each Bus Line
Write NV Register Busy Time
NONVOLATILE MEMORY RELIABILITY
Data Retention
Endurance
DD
_______________________________________________________________________________________
= +2.7V to +5.25V, GND = 0, REFH_ = V
where V
(V
0.5V). See Supply Current vs. Digital Input Voltage in the Typical Operating Characteristics.
final value for a code transition from 10 hex to F0 hex.
steady state at code 00 hex.
output with the reference of the DAC at a constant value and input code = 00 hex.
from a voltage level of (V
this web address: www.semiconductors.philips.com/acrobat/literature/9398/39340011.pdf.
PARAMETER
REFH
- V
F0,Meas
REFL
) x (240 / 256) + V
is the DAC voltage with input code F0 hex and V
DD
= +3.0V and T
IL
+ V
SYMBOL
t
t
t
t
t
HD:DAT
HD:STA
SU:DAT
SU:STO
SU:STA
t
t
IH
f
HIGH
t
LOW
SCL
BUF
t
C
t
t
SP
R
) / 2.
F
B
REFL
256
DD
.
A
×
= +25°C.) (Note 1)
, REFL_ = GND, R
(Note 9)
(Note 10)
T
T
T
(
A
A
A
V
F Meas
= +85°C
= +25°C
= +85°C
A
0
,
= +25°C. All temperature limits are guaranteed by design.
R
V
and t
REFH
−
ZCE V
F
. All digital input signals are specified with t
_
CONDITIONS
−
LOAD
F Ideal
0
,
= 5kΩ, C
F0,Ideal
)
is the ideal DAC voltage with input code F0 hex or
L
= 100pF, T
A
= -40°C to +85°C, unless otherwise
MIN
100
0.6
0.6
0.6
1.3
0.6
1.3
0
200,000
50,000
R
TYP
400
50
= t
DD
F
- 0.5V) and (GND +
= 2ns and timed
MAX
400
300
300
0.9
50
15
UNITS
Stores
Years
kHz
ms
µs
µs
µs
µs
ns
µs
ns
ns
µs
µs
ns
pF