max5556gsa Maxim Integrated Products, Inc., max5556gsa Datasheet
max5556gsa
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max5556gsa Summary of contents
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Rev 0; 5/06 General Description The MAX5556–MAX5559 stereo audio sigma-delta digital-to-analog converters (DACs) offer a simple and complete stereo digital-to-analog solution for media servers, set-top boxes, video-game hardware, automo- tive rear-seat entertainment and other general consumer audio applications. These ...
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Low-Cost Stereo Audio DACs ABSOLUTE MAXIMUM RATINGS V to GND ...........................................................-0.3V to +6.0V DD OUTL, OUTR, SDATA to GND................... -0. Current Into Any Pin (excluding V and GND)...............±10mA DD OUTL, OUTR Shorted to GND....................................Continuous SCLK, LRCLK, MCLK to ...
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ELECTRICAL CHARACTERISTICS (continued +4.75V to +5.5V, GND = 0V OUT 12.288MHz, measurement bandwidth 10Hz to 20kHz, unless otherwise specified. T Outputs are unloaded, unless otherwise noted. Typical values at V PARAMETER SYMBOL DC CHARACTERISTICS Interchannel Gain ...
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Low-Cost Stereo Audio DACs ELECTRICAL CHARACTERISTICS (continued +4.75V to +5.5V, GND = 0V OUT 12.288MHz, measurement bandwidth 10Hz to 20kHz, unless otherwise specified. T Outputs are unloaded, unless otherwise noted. Typical values at V PARAMETER SYMBOL ...
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GND = 0V 10kΩ OUT_ STOPBAND REJECTION 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 FREQUENCY (NORMALIZED ...
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Low-Cost Stereo Audio DACs (V = +5V, GND = 0V 10kΩ OUT_ UNWEIGHTED THD+N vs. FREQUENCY -60 INPUT = 1kHz 18-BIT SIGNAL, INTEGRATION BANDWIDTH = 20Hz TO 20kHz -70 -80 -90 -100 -110 ...
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PIN NAME Serial Audio Data Input. Data is clocked into the MAX5556–MAX5559 on the rising edge of the 1 SDATA internal or external SCLK. Data is input in two’s complement format, MSB first. The state of LRCLK determines whether data ...
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Low-Cost Stereo Audio DACs INTERPOLATOR SDATA SCLK SERIAL INTERFACE LRCLK MCLK INTERPOLATOR MAX5556–MAX5559 Figure 2. Functional Diagram 125 100 Figure 3. Load-Impedance Operating Region Integrated Analog Lowpass Filter The DAC output of the sigma-delta modulator is fol- ...
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Clock and Data Interface The MAX5556–MAX5559 strobe serial data (SDATA the rising edge of SCLK. LRCLK routes data to the left or right outputs and, along with SCLK, defines the number of bits per sample transferred. The digital ...
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Low-Cost Stereo Audio DACs LRCLK DATA DIRECTED TO OUTL SCLK SDATA MSB INTERNAL SERIAL CLOCK MODE • RIGHT-JUSTIFIED, 16-BIT DATA • INTERNAL SCLK = • INTERNAL SCLK = ...
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LRCLK SCLK SDATA Figure 8. External SCLK Serial Timing Diagram LRCLK SDATA INTERNAL SCLK Figure 9. Internal SCLK Serial Timing Diagram LRCLK MCLK INTERNAL SCLK SDATA Figure 10. Internal Serial Clock Generation ______________________________________________________________________________________ Low-Cost Stereo Audio DACs t SLRH t ...
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Low-Cost Stereo Audio DACs Left/Right Clock Input (LRCLK) LRCLK is the left/right clock input signal for the 3-wire interface and sets the sample frequency (f MAX5556, drive LRCLK low to direct data to OUTL or LRCLK high to direct data ...
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The MAX5558 accepts 16 bits of data in external serial clock mode and internal serial clock mode. Program the MCLK/LRCLK ratio to 384 to operate the internal serial clock Program the MCLK/LRCLK ratio to 256 ...
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Low-Cost Stereo Audio DACs OUTR MAX5556–MAX5559 OUTL Figure 12. Active Component Analog Output Filter 14 _______________________________________________________________________________________ 56pF +5V 5.23kΩ 24.3kΩ 33pF 10kΩ 59kΩ V BIAS 56pF +5V 5.23kΩ 24.3kΩ 33pF 10kΩ 59kΩ V BIAS ...
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OUTPUTS HELD AT CURRENT LEVELS VALID CLOCK RATIO RE-ESTABLISHED VALID CLOCK RATIO RE-ESTABLISHED OUTPUTS IMMEDIATELY RETURNED TO DC QUIESCENT LEVELS LofC = LOSS OF CLOCK EVENT Figure 13. Internal State Diagram ______________________________________________________________________________________ Low-Cost Stereo Audio DACs NO POWER APPLIED POWER-UP ...
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Low-Cost Stereo Audio DACs Pop and Click Suppression The MAX5556–MAX5559 feature a pop and click supression routine to reduce the unwanted audible effects of system transients. This routine produces glitch-free operation at the outputs during power-on, loss of clock, or ...
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OUTPUT VOLTAGE (OUTR OR OUTL) VALID MCLK/LRCLK RATIO DETECTED Figure 14. Power-Up Sequence INVALID CLOCK CONDITION OUTPUT VOLTAGE (OUTR OR OUTL) Figure 15. Invalid Clock Output Response ______________________________________________________________________________________ Low-Cost Stereo Audio DACs V SETTLES AT OUT_ QUIESCENT VOLTAGE (2.4V) V ...
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Low-Cost Stereo Audio DACs Power-Supply Connections and Ground Proper layout and grounding are essential for optimum performance. Use large traces for the power-supply inputs and analog outputs to minimize losses due to parasitic trace resistance. Large traces also aid in ...
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... Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 19 © 2006 Maxim Integrated Products Heslington Low-Cost Stereo Audio DACs 0∞-8∞ L SIDE VIEW Printed USA is a registered trademark of Maxim Integrated Products, Inc. Package Information INCHES MILLIMETERS DIM MIN MAX MIN MAX A 0.053 ...