max5853 Maxim Integrated Products, Inc., max5853 Datasheet
max5853
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max5853 Summary of contents
Page 1
... In power-down mode, the operating current is reduced to 1µA. The MAX5853 is packaged in a 40-pin thin QFN with exposed paddle (EP) and is specified for the extended (-40°C to +85°C) temperature range. Pin-compatible, higher speed, and lower resolution versions are also available ...
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Dual, 10-Bit, 80Msps, Current-Output DAC ABSOLUTE MAXIMUM RATINGS AV to AGND .........................................................-0. DGND.........................................................-0. CGND.........................................................-0. .............................................................- AGND to DGND.....................................................-0.3V to +0.3V ...
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Dual, 10-Bit, 80Msps, Current-Output DAC ELECTRICAL CHARACTERISTICS (continued) ( 3V, AGND = DGND = CGND = 20mA, differential output, output amplitude = 0dBFS, T tion test. T < +25°C guaranteed ...
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Dual, 10-Bit, 80Msps, Current-Output DAC ELECTRICAL CHARACTERISTICS (continued) ( 3V, AGND = DGND = CGND = 20mA, differential output, output amplitude = 0dBFS, T tion test. T < +25°C guaranteed ...
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Dual, 10-Bit, 80Msps, Current-Output DAC ELECTRICAL CHARACTERISTICS (continued) ( 3V, AGND = DGND = CGND = 20mA, differential output, output amplitude = 0dBFS, T tion test. T < +25°C guaranteed ...
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Dual, 10-Bit, 80Msps, Current-Output DAC ELECTRICAL CHARACTERISTICS (continued) ( 3V, AGND = DGND = CGND = 20mA, differential output, output amplitude = 0dBFS, T tion test. T < +25°C guaranteed ...
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Dual, 10-Bit, 80Msps, Current-Output DAC ( 3V, AGND = DGND = CGND = 0, external reference (unless otherwise noted +25°C.) A SPURIOUS-FREE DYNAMIC RANGE vs. OUTPUT FREQUENCY (f = ...
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Dual, 10-Bit, 80Msps, Current-Output DAC ( 3V, AGND = DGND = CGND = 0, external reference (unless otherwise noted +25°C.) A 8-TONE SFDR PLOT (f = 80MHz, 15MHz WINDOW) ...
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... CLK OUT 1.22750 1.22730 1.22710 1.22690 1.22670 1.22650 2.70 2.85 3.00 3.15 3.30 3.45 3.60 SUPPLY VOLTAGES (V) DYNAMIC RESPONSE FALL TIME MAX5853 toc21 10ns/div = 20mA, differential output, differential clock POWER DISSIPATION vs. CLOCK FREQUENCY (f = 10MHz 0dBFS) OUT OUT 200 190 DIFFERENTIAL CLOCK DRIVE 180 170 SINGLE-ENDED CLOCK DRIVE 160 ...
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Dual, 10-Bit, 80Msps, Current-Output DAC PIN NAME 1 DA9/PD Channel A Input Data Bit 9 (MSB)/Power-Down 2 DA8/DACEN Channel A Input Data Bit 8/DAC Enable Control 3 DA7/IDE Channel A Input Data Bit 7/Interleaved Data Enable Channel A Input Data ...
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... The full-scale output current range is adjustable from 2mA to 20mA to optimize power dissi- OUTPA pation and gain control. OUTNA The MAX5853 accepts an input data and a DAC con- version rate of 80MHz. The inputs are latched on the G0 rising edge of the clock whereas the output latches on G1 the following rising edge ...
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... The DAC outputs (previous data) are updated simultaneously on the same edge. If the DCE pin is pulled low, the MAX5853 operates in differential clock mode. In this mode, the clock signal has to be applied to the differential clock input pins CLKXP/CLKXN. The differential input accepts an input range of ≥0.5V ...
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... R REFO SET FS is the reference resistor that determines the amplifier out- put current of the MAX5853 (Figure 3). This current is mir- rored into the current-source array where I distributed between matched current segments and summed to valid output current readings for the DACs. ______________________________________________________________________________________ ...
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Dual, 10-Bit, 80Msps, Current-Output DAC CLKXN CLKXP t CDH CLK OUTPUT DCS DCH DA0–DA9 DACA - 1 DACA OUTNA OUTPA t t DCS DCH DB0–DB9 DACB - 1 DACB OUTNB OUTPB Figure 5. Timing Diagram for Noninterleaved ...
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... Analog quadrature upcon- verters have a DC common-mode input requirement of typically 0.7V to 1.0V. The MAX5853 differential I/Q out- puts can maintain the desired full-scale level at the required 0.7V to 1.0V DC common-mode level when powered from a single 2.85V (±5%) supply. The ...
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... Thermal Characteristics and Packaging Thermal Resistance 40-lead thin QFN-EP: θ = 38°C/W JA The MAX5853 is packaged in a 40-pin thin QFN-EP package, providing greater design flexibility, increased thermal efficiency, and optimized AC performance of the DAC. The EP enables the implementation of grounding techniques, which are necessary to ensure highest performance operation. ...
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... The glitch impulse is found by integrating the voltage of the glitch at the midscale transition over time. The glitch impulse is usu- ally specified in pV-s. Table 4. Part Selection Table Offset Error PART MAX5851 MAX5852 MAX5853 Gain Error MAX5854 TRANSISTOR COUNT: 9,035 PROCESS: CMOS / I x 32. REF Settling Time ...
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Dual, 10-Bit, 80Msps, Current-Output DAC (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, (The package drawing(s) in this data sheet may not reflect the most current specifications. For ...