max5895egktd Maxim Integrated Products, Inc., max5895egktd Datasheet
max5895egktd
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max5895egktd Summary of contents
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Rev 1; 4/07 16-Bit, 500Msps Interpolating and Modulating General Description The MAX5895 programmable interpolating, modulating, 500Msps, dual digital-to-analog converter (DAC) offers superior dynamic performance and is optimized for high-performance, wideband single- and multicarrier transmit applications. The device integrates a ...
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Interpolating and Modulating Dual DAC with CMOS Inputs ABSOLUTE MAXIMUM RATINGS GND, DACREF ..................-0.3V to +2.16V DD1.8 DD1 GND, DACREF ........-0.3V to +3.9V DD3.3 CLK DD3.3 DATACLK, A0–A15, ...
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Interpolating and Modulating ELECTRICAL CHARACTERISTICS (continued) ( 1.8V DD1.8 DD1.8 CLK mode, 50Ω double-terminated outputs, external reference at 1.25V +25°C, unless otherwise noted.) (Note 2) A PARAMETER SYMBOL ...
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Interpolating and Modulating Dual DAC with CMOS Inputs ELECTRICAL CHARACTERISTICS (continued) ( 1.8V DD1.8 DD1.8 CLK mode, 50Ω double-terminated outputs, external reference at 1.25V +25°C, unless otherwise noted.) ...
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Interpolating and Modulating ELECTRICAL CHARACTERISTICS (continued) ( 1.8V DD1.8 DD1.8 CLK mode, 50Ω double-terminated outputs, external reference at 1.25V +25°C, unless otherwise noted.) (Note 2) A PARAMETER SYMBOL ...
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Interpolating and Modulating Dual DAC with CMOS Inputs ELECTRICAL CHARACTERISTICS (continued) ( 1.8V DD1.8 DD1.8 CLK mode, 50Ω double-terminated outputs, external reference at 1.25V +25°C, unless otherwise noted.) ...
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Interpolating and Modulating ( 1.8V DD1.8 DD1.8 CLK 50Ω load +25°C, unless otherwise noted.) A SFDR vs. OUTPUT FREQUENCY f = 125MWps, NO INTERPOLATION DATA 120 -0.1dBFS 100 -6dBFS 80 ...
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Interpolating and Modulating Dual DAC with CMOS Inputs ( 1.8V DD1.8 DD1.8 CLK 50Ω load +25°C, unless otherwise noted.) A TWO-TONE IMD vs. OUTPUT FREQUENCY f = 125MWps, 2x INTERPOLATION ...
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Interpolating and Modulating ( 1.8V DD1.8 DD1.8 CLK 50Ω load +25°C, unless otherwise noted.) A NOISE DENSITY vs. DAC UPDATE RATE f = 16MHz, 10MHz OFFSET OUT -100 2x, 4x, ...
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Interpolating and Modulating Dual DAC with CMOS Inputs PIN NAME 1 CLKP Noninverting Differential Clock Input 2 CLKN Inverting Differential Clock Input N.C. Internally Connected. Do not connect. Digital Power Supply. Accepts a 1.71V to ...
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Interpolating and Modulating PIN NAME Low Analog Power Supply. Accepts a 1.71V to 1.89V supply range. Bypass each pin to GND with 53 DD1.8 a 0.1µF capacitor as close to the pin as possible. 54, 56, ...
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Interpolating and Modulating Dual DAC with CMOS Inputs Detailed Description The MAX5895 dual, 500Msps, high-speed, 16-bit, cur- rent-output DAC provides superior performance in communication systems requiring low-distortion ana- log-signal reconstruction. The MAX5895 combines two DAC cores with 8x/4x/2x/1x ...
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Interpolating and Modulating When writing to the MAX5895, data is shifted into SDI; data is shifted out of SDO in a read operation. Bits the control byte are the address bits. These bits set ...
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Interpolating and Modulating Dual DAC with CMOS Inputs CS SCLK SDI SDO Figure 3. SPI Serial-Interface Timing Diagram 14 ______________________________________________________________________________________ SDS SDH t SDV ...
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Interpolating and Modulating Programming Registers Programming its registers with the SPI serial interface sets the MAX5895 operation modes. Table 2 shows all Table 2. MAX5895 Programmable Registers ADD BIT 7 BIT 6 Software Reset 0 = MSB first ...
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Interpolating and Modulating Dual DAC with CMOS Inputs Address 00h Bit 6 Logic 0 (default) causes the serial port to use MSB first address/data format. When set to a logic 1, the serial port will use LSB first ...
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Interpolating and Modulating Address 07h Bit 7 Logic 0 (default) adds the 10 bits offset cur- rent to OUTIN. A logic 1 adds the 10 bits off- set current to OUTIP. Address 08h Bits 7–0 These eight bits ...
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Interpolating and Modulating Dual DAC with CMOS Inputs tionship and detects if the phase drifts more than ±1 data clock cycle. If this occurs, the synchronizer auto- matically reestablishes synchronization. However, dur- ing the resynchronization phase ...
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Interpolating and Modulating The MAX5895 can be configured to latch the input data on either the rising edge or falling edge of the DATACLK signal (bit 4, address 02h). Figure 4 shows the timing requirements between the DATACLK ...
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Interpolating and Modulating Dual DAC with CMOS Inputs ter is located after the modulator. In the 8x interpolation mode, the last filter (FIR3) can be configured as low- pass or highpass (bit 5, address 01h) to select the ...
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Interpolating and Modulating 3) Sin(x)/x rolloff is reduced over the effective bandwidth. Figure 9 illustrates a practical example of the benefits when using the MAX5895 in 2x, 4x, and 8x interpolation modes with the third filter configured as ...
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Interpolating and Modulating Dual DAC with CMOS Inputs SIGNAL IMAGE INPUT SPECTRUM AND FIRST FILTER RESPONSE SIGNAL OUTPUT SPECTRUM OF THE FIRST FILTER INPUT SIGNAL SPECTRUM AND SECOND FILTER RESPONSE ...
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Interpolating and Modulating SIGNAL IMAGE INPUT SPECTRUM AND FIRST FILTER RESPONSE SIGNAL OUTPUT SPECTRUM OF THE FIRST FILTER INPUT SIGNAL SPECTRUM AND SECOND FILTER RESPONSE SIGNAL OUTPUT SPECTRUM OF ...
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Interpolating and Modulating Dual DAC with CMOS Inputs similar to the first filter and removes the images at 2f 10f , etc. Finally, the third filter removes images 12f , 20f , etc. Figures 10, ...
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Interpolating and Modulating their default values in Table 2. During power-on, RESET must be held low until all power supplies have stabi- lized. Alternatively, programming bit 5 of address 00h to a logic-high also resets the MAX5895 after ...
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Interpolating and Modulating Dual DAC with CMOS Inputs sources directly to the device without external resistors to define the DC level. The input resistance of CLKP and CLKN is 5kΩ. 100nF MINI-CIRCUITS 24.9Ω ADTL1-12 SINGLE-ENDED IINPUT 1:1 RATIO ...
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Interpolating and Modulating especially at low output frequencies and high signal amplitudes recommended to connect the trans- former center tap to ground transformer is not used, the outputs must have a resistive termination to ...
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Interpolating and Modulating Dual DAC with CMOS Inputs Reference Input/Output The MAX5895 supports operation with the on-chip 1.2V bandgap reference or an external reference voltage source. REFIO serves as the input for an external, low- impedance reference source, ...
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Interpolating and Modulating Power Supplies, Bypassing, Decoupling, and Layout Grounding and power-supply decoupling strongly influ- ence the MAX5895 performance. Unwanted digital crosstalk can couple through the input, reference, power-supply, and ground connections, which can affect dynamic specifications like ...
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Interpolating and Modulating Dual DAC with CMOS Inputs However, noise sources such as thermal noise, refer- ence noise, clock jitter, etc. affect the ideal reading. Therefore, SNR is computed by taking the ratio of the RMS signal to ...
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Interpolating and Modulating (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/packages.) ______________________________________________________________________________________ Dual DAC with CMOS Inputs PACKAGE OUTLINE, 68L QFN, 10x10x0.9 MM ...
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... Maxim reserves the right to change the circuitry and specifications without notice at any time. 32 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2007 Maxim Integrated Products Package Information (continued) PACKAGE OUTLINE, 68L QFN, 10x10x0.9 MM 21-0122 is a registered trademark of Maxim Integrated Products, Inc ...