max5894egktd Maxim Integrated Products, Inc., max5894egktd Datasheet
max5894egktd
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max5894egktd Summary of contents
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Rev 1; 4/07 14-Bit, 500Msps, Interpolating and Modulating General Description The MAX5894 programmable interpolating, modulating, 500Msps, dual digital-to-analog converter (DAC) offers superior dynamic performance and is optimized for high- performance wideband, single-carrier transmit applica- tions. The device integrates a ...
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Interpolating and Modulating Dual DAC with CMOS Inputs ABSOLUTE MAXIMUM RATINGS GND, DACREF ..................-0.3V to +2.16V DD1.8 DD1 GND, DACREF ........-0.3V to +3.9V DD3.3 CLK DD3.3 DATACLK, A0–A13, ...
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Interpolating and Modulating ELECTRICAL CHARACTERISTICS (continued) ( 1.8V DD1.8 DD1.8 CLK mode, 50Ω double-terminated outputs, external reference at 1.25V +25°C, unless otherwise noted.) (Note 2) A PARAMETER SYMBOL ...
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Interpolating and Modulating Dual DAC with CMOS Inputs ELECTRICAL CHARACTERISTICS (continued) ( 1.8V DD1.8 DD1.8 CLK mode, 50Ω double-terminated outputs, external reference at 1.25V +25°C, unless otherwise noted.) ...
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Interpolating and Modulating ELECTRICAL CHARACTERISTICS (continued) ( 1.8V DD1.8 DD1.8 CLK mode, 50Ω double-terminated outputs, external reference at 1.25V +25°C, unless otherwise noted.) (Note 2) A PARAMETER SYMBOL ...
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Interpolating and Modulating Dual DAC with CMOS Inputs ELECTRICAL CHARACTERISTICS (continued) ( 1.8V DD1.8 DD1.8 CLK mode, 50Ω double-terminated outputs, external reference at 1.25V +25°C, unless otherwise noted.) ...
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Interpolating and Modulating ( 1.8V DD1.8 DD1.8 CLK 50Ω load +25°C, unless otherwise noted.) A IN-BAND SFDR vs. OUTPUT FREQUENCY f = 125Mwps, 2x INTERPOLATION DATA 120 -0.1dBFS -6dBFS 100 ...
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Interpolating and Modulating Dual DAC with CMOS Inputs ( 1.8V DD1.8 DD1.8 CLK 50Ω load +25°C, unless otherwise noted.) A GAIN MISMATCH vs. TEMPERATURE f = 125Mwps, 2x INTERPOLATION DATA ...
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Interpolating and Modulating ( 1.8V DD1.8 DD1.8 CLK 50Ω load +25°C, unless otherwise noted.) A WCDMA ACLR vs. OUTPUT FREQUENCY f = 122.88Mwps, 4x INTERPOLATION DATA 100 ONE-CARRIER ADJACENT CHANNEL ...
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Interpolating and Modulating Dual DAC with CMOS Inputs PIN NAME 1 CLKP Noninverting Differential Clock Input. Internally biased CLKN Inverting Differential Clock Input. Internally biased 24, 25, N.C. Internally Connected. ...
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Interpolating and Modulating PIN NAME Low Analog Power Supply. Accepts a 1.71V to 1.89V supply range. Bypass each pin to GND with 53 DD1.8 a 0.1µF capacitor as close to the pin as possible. 54, 56, ...
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Interpolating and Modulating Dual DAC with CMOS Inputs Detailed Description The MAX5894 dual, 500Msps, high-speed, 14-bit, cur- rent-output DAC provides superior performance in communication systems requiring low-distortion ana- log-signal reconstruction. The MAX5894 combines two DAC cores with 8x/4x/2x/1x ...
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Interpolating and Modulating When writing to the MAX5894, data is shifted into DIN; data is shifted out of DOUT in a read operation. Bits the control byte are the address bits. These bits set ...
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Interpolating and Modulating Dual DAC with CMOS Inputs CS SCLK DIN DOUT Figure 3. SPI Serial-Interface Timing Diagram 14 ______________________________________________________________________________________ SDS SDH t SDV ...
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Interpolating and Modulating Programming Registers Programming its registers with the SPI serial interface sets the MAX5894 operation modes. Table 2 shows all Table 2. MAX5894 Programmable Registers ADD BIT 7 BIT 6 Software Reset 0 = MSB first ...
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Interpolating and Modulating Dual DAC with CMOS Inputs Address 00h Bit 6 Logic 0 (default) causes the serial port to use MSB first address/data format. When set to a logic 1, the serial port uses LSB first address/ ...
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Interpolating and Modulating Address 07h Bit 7 Logic 0 (default) adds the 10 bits offset cur- rent to OUTIN. A logic 1 adds the 10 bits off- set current to OUTIP. Address 08h Bits 7–0 These eight bits ...
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Interpolating and Modulating Dual DAC with CMOS Inputs Subsequently, the MAX5894 monitors the phase rela- tionship and detects if the phase drifts more than ±1 data clock cycle. If this occurs, the synchronizer auto- matically re-establishes synchronization. However, ...
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Interpolating and Modulating Interpolating Filter The MAX5894 features three cascaded FIR half-band filters. The interpolating filters are enabled or disabled in combinations to support 1x (no interpolation), 2x, 4x interpolation. Bits 7 and 6 of register ...
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Interpolating and Modulating Dual DAC with CMOS Inputs The programmable interpolation filters multiply the MAX5894 input data rate by a factor of 2x, 4x separate the reconstructed waveform spectrum and the DAC image. The original ...
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Interpolating and Modulating images at odd numbers of f are filtered. At the output of S the first filter, the images are then passed to the second interpolating filter, which is similar to ...
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Interpolating and Modulating Dual DAC with CMOS Inputs SIGNAL IMAGE INPUT SPECTRUM AND FIRST FILTER RESPONSE SIGNAL OUTPUT SPECTRUM OF THE FIRST FILTER INPUT SIGNAL SPECTRUM AND SECOND FILTER RESPONSE ...
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Interpolating and Modulating SIGNAL IMAGE INPUT SPECTRUM AND FIRST FILTER RESPONSE f S SIGNAL OUTPUT SPECTRUM OF THE FIRST FILTER f S INPUT SIGNAL SPECTRUM AND SECOND FILTER RESPONSE f S SIGNAL OUTPUT SPECTRUM OF THE SECOND FILTER ...
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Interpolating and Modulating Dual DAC with CMOS Inputs Digital Modulator The MAX5894 features digital modulation at frequencies and where f is the data rate at the input to ...
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Interpolating and Modulating Power-Down Mode The MAX5894 features three power-saving modes. Each DAC can be individually powered down through bits 2 and 3 of address 00h. The interpolation filters can also be powered down through bit 4 of ...
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Interpolating and Modulating Dual DAC with CMOS Inputs sources directly to the device without external resistors to define the DC level. The input resistance of CLKP and CLKN is 5kΩ. A convenient way to apply a differential signal ...
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Interpolating and Modulating If a transformer is not used, the outputs must have a resistive termination to ground. Figure 17 shows the MAX5894 output configured for differential DC-coupled mode. The DC-coupled configuration can be used to eliminate waveform ...
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Interpolating and Modulating Dual DAC with CMOS Inputs REFIO must be buffered with an external amplifier, if heavy loading is required, due to its 10kΩ output resistance. Alternatively, apply a temperature-stable external refer- ence to REFIO (Figure 18). ...
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Interpolating and Modulating Power Supplies, Bypassing, Decoupling, and Layout Grounding and power-supply decoupling strongly influ- ence the MAX5894 performance. Unwanted digital crosstalk can couple through the input, reference, power-supply, and ground connections, which can affect dynamic specifications like ...
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Interpolating and Modulating Dual DAC with CMOS Inputs However, noise sources such as thermal noise, refer- ence noise, clock jitter, etc., affect the ideal reading. Therefore, SNR is computed by taking the ratio of the RMS signal to ...
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Interpolating and Modulating TOP VIEW 68 CLKP 1 CLKN 2 N.C. 3 N. VDD1.8 A13 7 A12 8 A11 9 A10 VDD3.3 DATACLK ...
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Interpolating and Modulating Dual DAC with CMOS Inputs (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/packages.) 32 ______________________________________________________________________________________ Package Information PACKAGE OUTLINE, 68L ...
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... Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 33 © 2007 Maxim Integrated Products Dual DAC with CMOS Inputs Package Information (continued) PACKAGE OUTLINE, 68L QFN, 10x10x0 registered trademark of Maxim Integrated Products, Inc. 1 21-0122 C 2 ...