max5898egktd Maxim Integrated Products, Inc., max5898egktd Datasheet
max5898egktd
Related parts for max5898egktd
max5898egktd Summary of contents
Page 1
Rev 1; 7/07 16-Bit, 500Msps, Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs General Description The MAX5898 programmable interpolating, modulating, 500Msps, dual digital-to-analog converter (DAC) offers superior dynamic performance and is optimized for high- performance wideband, single- and ...
Page 2
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs ABSOLUTE MAXIMUM RATINGS GND, DACREF ..................-0.3V to +2.16V DD1.8 DD1 GND, DACREF ........-0.3V to +3.9V DD3.3 CLK DD3.3 DATACLKP, ...
Page 3
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs ELECTRICAL CHARACTERISTICS (continued) ( 1.8V DD1.8 DD1.8 CLK 50Ω double-terminated, external reference at 1.25V, T unless otherwise noted.) (Note 2) PARAMETER SYMBOL In-Band ...
Page 4
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs ELECTRICAL CHARACTERISTICS (continued) ( 1.8V DD1.8 DD1.8 CLK 50Ω double-terminated, external reference at 1.25V, T unless otherwise noted.) (Note 2) PARAMETER SYMBOL Output ...
Page 5
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs ELECTRICAL CHARACTERISTICS (continued) ( 1.8V DD1.8 DD1.8 CLK 50Ω double-terminated, external reference at 1.25V, T unless otherwise noted.) (Note 2) PARAMETER SYMBOL Rise/Fall ...
Page 6
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs ELECTRICAL CHARACTERISTICS (continued) ( 1.8V DD1.8 DD1.8 CLK 50Ω double-terminated, external reference at 1.25V, T unless otherwise noted.) (Note 2) PARAMETER SYMBOL Clock ...
Page 7
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs ( 1.8V DD1.8 DD1.8 CLK R = 50Ω double-terminated, I LOAD OUTFS SFDR vs. OUTPUT FREQUENCY f = 125Mwps, NO INTERPOLATION DATA 120 ...
Page 8
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs ( 1.8V DD1.8 DD1.8 CLK R = 50Ω double-terminated, I LOAD OUTFS TWO-TONE IMD vs. OUTPUT FREQUENCY f = 125Mwps, 2x INTERPOLATION DATA ...
Page 9
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs ( 1.8V DD1.8 DD1.8 CLK R = 50Ω double-terminated, I LOAD OUTFS NOISE DENSITY vs. DAC UPDATE RATE f = 16MHz ...
Page 10
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs PIN NAME 1 CLKP Noninverting Differential Clock Input. Internally biased CLKN Inverting Differential Clock Input. Internally biased N.C. Internally Connected. Do not connect. ...
Page 11
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs PIN NAME 35 D3N Complementary LVDS Data Bit 3. Internal 110Ω termination to D3P. 36 D3P LVDS Data Bit 3. Internal 110Ω termination to D3N. 38 D2N Complementary LVDS ...
Page 12
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs D0–D15 DATACLK SELIQ /2 CONTROL REGISTERS SERIAL INTERFACE RESET DOUT DIN CS Detailed Description The MAX5898 dual, 500Msps, high-speed, 16-bit, cur- rent-output DAC provides superior performance in com- munication ...
Page 13
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs and DV ), which minimize noise CLK DD3.3 DD1.8 coupling from one supply to the other operate from a typical 1.8V supply, and ...
Page 14
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs CS READ CYCLE SCLK ADDRESS DIN HIGH DOUT IMPEDANCE Figure 2. SPI Serial-Interface Read Cycle, MSB-First Mode CS ...
Page 15
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs Programming Registers Programming its registers with the SPI serial interface sets the MAX5898 operation modes. Table 2 shows all Table 2. MAX5898 Programmable Registers ADD BIT 7 BIT 6 ...
Page 16
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs Address 00h Bit 6 Logic 0 (default) causes the serial port to use MSB first address/data format. When set to a logic 1, the serial port uses LSB first ...
Page 17
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs Address 07h Bit 7 Logic 0 (default) adds the 10 bits offset cur- rent to OUTIN. A logic 1 adds the 10 bits off- set current to OUTIP. Address ...
Page 18
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs DATACLK Modes The MAX5898 employs a differential LVDS DATACLK located at pins 4 and 5. The DATACLK can be config- ured as either an input output ...
Page 19
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs Interpolating Filter The MAX5898 features three cascaded FIR half-band filters. The interpolating filters are enabled or disabled in combinations to support 1x (no interpolation), 2x, 4x interpolation. ...
Page 20
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs The programmable interpolation filters multiply the MAX5898 input data rate by a factor of 2x, 4x separate the reconstructed waveform spectrum and the DAC image. The ...
Page 21
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs images at odd numbers of f are filtered. At the output of S the first filter, the images are then passed to the second ...
Page 22
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs SIGNAL IMAGE INPUT SPECTRUM AND FIRST FILTER RESPONSE SIGNAL OUTPUT SPECTRUM OF THE FIRST FILTER INPUT SIGNAL SPECTRUM AND SECOND FILTER RESPONSE f ...
Page 23
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs SIGNAL IMAGE INPUT SPECTRUM AND FIRST FILTER RESPONSE SIGNAL OUTPUT SPECTRUM OF THE FIRST FILTER INPUT SIGNAL SPECTRUM AND SECOND FILTER RESPONSE f ...
Page 24
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs Digital Modulator The MAX5898 features digital modulation at frequencies and where f is the data rate at the input ...
Page 25
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs Power-Down Mode The MAX5898 features three power-saving modes. Each DAC can be individually powered down through bits 2 and 3 of address 00h. The interpolation filters can also be ...
Page 26
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs sources directly to the device without external resistors to define the DC level. The input resistance of CLKP and CLKN is 5kΩ. A convenient way to apply a differential ...
Page 27
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs If a transformer is not used, the outputs must have a resistive termination to ground. Figure 17 shows the MAX5898 output configured for differential DC-coupled mode. The DC-coupled configuration ...
Page 28
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs 1.2V REFERENCE 10kΩ EXTERNAL REFIO 1.25V REFERENCE 1μF FSADJ I REF R SET DACREF Figure 18. Typical External Reference Circuit Table 5. I and R Selection Matrix Based on ...
Page 29
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs Static Performance Parameter Integral Nonlinearity (INL) Integral nonlinearity is the deviation of the values on an actual transfer function from either a best-straight-line fit (closest approximation to the actual ...
Page 30
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs TOP VIEW CLKP 1 CLKN 2 N.C. 3 DATACLKP 4 DATACLKN VDD1.8 SELIQN 7 SELIQP 8 D15N 9 D15P 10 D14N 11 D14P 12 D13N 13 ...
Page 31
Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/packages.) ______________________________________________________________________________________ Package Information PACKAGE OUTLINE, 68L ...
Page 32
... Maxim reserves the right to change the circuitry and specifications without notice at any time. 32 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2007 Maxim Integrated Products Package Information PACKAGE OUTLINE, 68L QFN, 10x10x0.9 MM 21-0122 is a registered trademark of Maxim Integrated Products, Inc ...