max5822meuat Maxim Integrated Products, Inc., max5822meuat Datasheet - Page 8

• Manufacturer Part Number: max5822meuat
• Description: Max5822 Dual, 12-bit, Low-power, 2-wire, Serial Voltage-output Dac
• Manufacturer: Maxim Integrated Products, Inc.

bus is 8 bits long and is always followed by an
acknowledge clock pulse.
The MAX5822 SDA and SCL drivers are open-drain out-
puts, requiring a pullup resistor to generate a logic-high
voltage (see the Typical Operating Circuit). Series
resistors R
the input stages of the MAX5822 from high-voltage
spikes on the bus lines, and minimize crosstalk and
undershoot of the bus signals.
One data bit is transferred during each SCL clock
cycle. The data on SDA must remain stable during the
high period of the SCL clock pulse. Changes in SDA
while SCL is high are control signals (see the START
and STOP Conditions section). Both SDA and SCL idle
high when the I
Dual, 12-Bit, Low-Power, 2-Wire, Serial
Voltage-Output DAC
Table 1. Power-Down Command Bits
Figure 1. 2-Wire Serial Interface Timing Diagram
8
COMMAND BITS
PD1
_______________________________________________________________________________________
POWER-DOWN
0
0
1
1
SDA
SCL
t
HD, STA
START CONDITION
S
are optional. These series resistors protect
PD0
2
0
1
0
1
C bus is not busy.
t
Power-up device. DAC output
restored to previous value.
Power-down mode 0. Power down
device with output floating.
Power-down mode 1. Power down
device with output terminated with
1k
Power-down mode 2. Power down
device with output terminated with
100k
LOW
to GND.
t
R
to GND.
t
t
SU, DAT
HIGH
MODE/FUNCTION
t
F
t
HD, DAT
Bit Transfer
t
SU, STA
REPEATED START CONDITION
When the serial interface is inactive, SDA and SCL idle
high. A master device initiates communication by issu-
ing a START condition. A START condition is a high-to-
low transition on SDA with SCL high. A STOP condition
is a low-to-high transition on SDA, while SCL is high
(Figure 2). A START condition from the master signals
the beginning of a transmission to the MAX5822. The
master terminates transmission by issuing a not-
acknowledge followed by a STOP condition (see the
Acknowledge Bit (ACK) section). The STOP condition
frees the bus. If a repeated START condition (S
generated instead of a STOP condition, the bus
remains active. When a STOP condition or incorrect
address is detected, the MAX5822 internally discon-
nects SCL from the serial interface until the next START
condition, minimizing digital noise and feedthrough.
The MAX5822 recognizes a STOP condition at any
point during transmission except if a STOP condition
occurs in the same high pulse as a START condition
(Figure 3). This condition is not a legal I
least one clock pulse must separate any START and
STOP conditions.
A repeated START (S
change of data direction on the bus. Such a change
occurs when a command word is required to initiate a
read operation. S
master is writing to several I
want to relinquish control of the bus. The MAX5822 seri-
al interface supports continuous write operations with or
without an S
read operations require S
change in direction of data flow.
t
HD, STA
r
condition separating them. Continuous
r
may also be used when the bus
t
SP
t
START and STOP Conditions
r
SU, STO
Repeated START Conditions
) condition may indicate a
r
conditions because of the
2
C devices and does not
Early STOP Conditions
CONDITION
STOP
t
BUF
CONDITION
2
START
C format; at
r
) is