lm12l458civf National Semiconductor Corporation, lm12l458civf Datasheet - Page 6

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lm12l458civf

Manufacturer Part Number
lm12l458civf
Description
12-bit Sign Data Acquisition System With Self-calibration
Manufacturer
National Semiconductor Corporation
Datasheet
www.national.com
Figures 10, 11, 12)
Digital Timing Characteristics
The following specifications apply for V
unless otherwise specified. Boldface limits apply for T
Electrical Characteristics
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: All voltages are measured with respect to GND, unless otherwise specified.
Note 3: When the input voltage (V
The 20 mA maximum package input current rating allows the voltage at any four pins, with an input current of 5 mA, to simultaneously exceed the power supply
voltages.
Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
to ambient thermal resistance), and T
number given in the Absolute Maximum Ratings, whichever is lower.
Note 5: Human body model, 100 pF discharged through a 1.5 kΩ resistor.
Note 6: Two on-chip diodes are tied to each analog input through a series resistor, as shown below. Input voltage magnitude up to 5V above V
will not damage the LM12L458. However, errors in the A/D conversion can occur if these diodes are forward biased by more than 100 mV. As an example, if V
is 3.0 V
Symbol (See
DC
1, 3
2, 4
10
11
12
13
14
15
16
17
18
20
21
19
22
23
5
6
7
8
9
, full-scale input voltage must be ≤3.1 V
CS or Address Valid to ALE Low Set-Up
Time
CS or Address Valid to ALE Low Hold
Time
ALE Pulse Width
RD High to Next ALE High
ALE Low to RD Low
RD Pulse Width
RD High to Next RD or WR Low
ALE Low to WR Low
WR Pulse Width
WR High to Next ALE High
WR High to Next RD or WR Low
Data Valid to WR High Set-Up Time
Data Valid to WR High Hold Time
RD Low to Data Bus Out of TRI-STATE
RD High to TRI-STATE
RD Low to Data Valid (Access Time)
Address Valid or CS Low to RD Low
Address Valid or CS Low to WR Low
Address Invalid from RD or WR High
INT High from RD Low
DMARQ Low from RD Low
IN
) at any pin exceeds the power supply rails (V
A
(ambient temperature). The maximum allowable power dissipation at any temperature is PD
Parameter
A
DC
+ = V
to ensure accurate conversions.
D
+ = +3.3V, t
A
= T
r
= t
J
6
f
= T
IN
= 3 ns, and C
<
R
MIN
GND or V
Conditions
L
= 1 kΩ
to T
IN
MAX
>
L
(V
; all other limits T
= 100 pF on data I/O, INT and DMARQ lines
A
Jmax
+ or V
(maximum junction temperature), θ
(Note 10)
D
Typical
+)), the current at that pin should be limited to 5 mA.
30
30
30
30
30
A
= T
J
(Note 11)
Limits
= 25˚C. (Notes 6, 7, 8)
max
100
100
140
110
40
20
45
35
20
20
60
75
40
30
10
70
10
10
95
20
20
10
10
60
10
60
= (T
Jmax
A
JA
+ or 5V below GND
(package junction
− T
A
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
)/θ
Units
JA
or the
A
+

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