pca9535ecmttxg ON Semiconductor, pca9535ecmttxg Datasheet - Page 14

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pca9535ecmttxg

Manufacturer Part Number
pca9535ecmttxg
Description
Pca9535e, Pca9535ec 16-bit Low-power I/o Expander For I2c Bus With Interrupt
Manufacturer
ON Semiconductor
Datasheet

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Characteristics of the I
between different ICs or modules. The two lines are the
serial data line (SDA) and the serial clock line (SCL). Both
lines must be connected to a positive supply via a pull−up
resistor when connected to the output stages of a device.
Data transfer may only be initiated when the bus is not busy.
START and STOP conditions
not busy. A START condition (S) occurs when there is a
HIGH−to−LOW transition of the data line while the clock is
The I
Both data and clock lines remain HIGH when the bus is
Figure 12. High Value Resistor in Parallel
2
C−bus is meant for 2−way, 2−line communication
SDA
SCL
V
DD
LEDn
START condition
with the LED
2
SDA
C−bus
SCL
S
Figure 15. Definition of START and STOP Conditions
LED
100 kW
V
DD
data valid
data line
stable;
Figure 14. Bit Transfer
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14
allowed
change
of data
Bit transfer
data on the SDA line must remain stable during the HIGH
period of the clock pulse. Changes in the data line during the
HIGH period of the clock pulse will be interpreted as control
signals (see Figure 14).
HIGH. A STOP condition (P) occurs when there is a
LOW−to−HIGH transition of the data line while the clock is
HIGH (see Figure 15).
One data bit is transferred during each clock pulse. The
Figure 13. Device Supplied by a Lower Voltage
3.3 V
V
STOP condition
DD
LEDn
P
5 V
LED
SDA
SCL

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