AD9617BQ Analog Devices, AD9617BQ Datasheet - Page 9

• Manufacturer Part Number: AD9617BQ
• Description: Low Distortion, Precision, Wide Bandwidth op Amp
• Manufacturer: Analog Devices

The effective noise at the output of the amplifier can be deter-
mined by taking the root sum of the squares of Equation 11 and
applying the spectral noise values found in the typical graph
section. This applies to noise from the op amp only. Note that
both the noise figure and equivalent input offset voltages im-
prove as the closed loop gain is increased (by keeping R
and reducing R
Capacitive Load Considerations
Due to the low inverting input resistance (R
design, the AD9617 can directly handle input and/or output
load capacitances of up to 20 pF. See the chart below.
A small series resistor can be used at the output of the amplifier
and outside of the feedback loop to facilitate driving larger ca-
pacitive loads or for obtaining faster settling time. For capacitive
loads above 20 pF, R
REV. B
35
30
25
20
15
10
5pF
Figure 18. Input/Output Capacitance Comparisons
V
CL = 0pF
OUT
25
20
15
10
INPUT CAPACITANCE – CLI
5
0
= 4V STEP
0
Figure 19. Recommended R
Figure 17. Capacitive Load Figure
In
I
4pF/DIV
with R
CLI
20
SERIES
N
= 0 ).
should be considered.
40
400
25pF
R
SERIES
CL – pF
10pF
= 0
R
V
CLI = 0pF
SERIES
60
OUT
500
INPUT CAPACITANCE – CL
R
= 4V STEP
SERIES
L
S
) and output buffer
4pF/DIV
80
CL
vs. CL
100
F
fixed
30pF
–9–
APPLYING THE AD9617
The superior frequency and time domain specifications of the
AD9617 make it an obvious choice for driving flash converters
and buffering the outputs of high speed DACs. Its outstanding
distortion and noise performance make it well suited as a driver
for analog to digital converters (ADCs) with resolutions as high
as 16 bits.
Typical circuits for inverting and noninverting applications are
shown in Figures 20 and 21.
Closed-loop gain for noninverting configurations is determined
by the value of RI according to the equation:
G 1
R
R
F
I
V
Figure 20. Noninverting Operation
IN
V
Figure 21. Inverting Operation
IN
R
IN
R
R
R
TERM
I
I
AD9617
+V
–V
AD9617
+V
–V
S
S
0.1 F
0.1 F
S
S
0.1 F
0.1 F
3.3 F
0.1 F
0.1 F
3.3 F
400
3.3 F
0.1 F
0.1 F
3.3 F
400
V
OUT
V
AD9617
OUT
(12)