atf1502be ATMEL Corporation, atf1502be Datasheet - Page 9

• Manufacturer Part Number: atf1502be
• Description: High- Performance Cpld
• Manufacturer: ATMEL Corporation

5.2
5.3
5.4
3492A–PLD–12/05
On-the-Fly – OTF
Direct Reconfiguration Access – DRA
ISP Programming Protection
In this mode, the CPLD design pattern stored in the internal configuration memory can be modi-
fied while the previous design pattern is operating with minimal disturbance to the operation of
the current design. The new configuration will take affect after the OTF programming process is
completed and the OTF mode is exited.
The configuration data for any design is stored in the internal configuration memory. Once the
configuration data is transferred to the internal static registers of the CPLD, the CPLD operates
with the design pattern and the configuration memory is free to be re-loaded with a new set of
configuration data. The design pattern due to the new configuration content is activated through
an initialization cycle that occurs on exiting the OTF mode or after the next power up sequence.
Figure 5-2
mode. The processor is the controlling device that communicates with the CPLD and uses con-
figuration data stored in the external memory to configure the CPLD.
Figure 5-2.
This reconfiguration mode allows the user to directly modify the internal static registers of the
CPLD without affecting the configuration data stored in the embedded memory. It is more useful
in cases where immediate and temporary context change in the function of the hardware is
desired.
The CPLD embedded configuration memory does not change when a new set of configuration
data is passed to the chip using the DRA mode. Instead, the internal static registers of the CPLD
are directly written with the data entering the chip via the JTAG port. In other words, it's a tempo-
rary change in the function performed by the CPLD since a power sequence results in the device
being configured again by the data stored in the embedded memory.
The ATF1502BE has a special feature that locks the device and prevents the inputs and I/O
from driving if the programming process is interrupted for any reason. The inputs and I/O default
to high-Z state during such a condition.
CPLD Device
ATF1502BE
shows the electrical interface for configuration of the ATF1502BE device in the OTF
Configuration of ATF1502BE Device Using a Processor and Memory
TDO
TMS
TCK
TDI
Serial Data
Data
ATF1502BE
Processor
Memory
Address
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