adsp-21020 Analog Devices, Inc., adsp-21020 Datasheet - Page 24

• Manufacturer Part Number: adsp-21020
• Description: 32/40-bit Ieee Floating-point Dsp Microprocessor
• Manufacturer: Analog Devices, Inc.

ADSP-21020
TEST CONDITIONS
Output Disable Time
Output pins are considered to be disabled when they stop
driving, go into a high-impedance state, and start to decay from
their output high or low voltage. The time for the voltage on the
bus to decay by V is dependent on the capacitive load, C
the load current, I
equation:
The output disable time (t
t
t
switches to when the output voltage decays V from the
measured output high or output low voltage. t
calculated with V equal to 0.5 V, and test loads C
Output Enable Time
Output pins are considered to be enabled when they have made
a transition from a high-impedance state to when they start
driving. The output enable time (t
a reference signal reaches a high or low voltage level to when the
output has reached a specified high or low trip point, as shown
in the Output Enable/Disable diagram. If multiple pins (such as
the data bus) are enabled, the measurement value is that of the
first pin to start driving.
Example System Hold Time Calculation
To determine the data output hold time in a particular system,
first calculate t
the difference between the ADSP-21020’s output voltage and
the input threshold for the device requiring the hold time. A
typical V will be 0.4 V. C
data line), and I
data line). The hold time will be t
disable time (i.e. t
MEASURED
MEASURED
) is the interval from when the reference signal
and t
DECAY
DECAY
L
L
is the total leakage or three-state current (per
HDWD
. It can be approximated by the following
V
V
OH (MEASURED)
OL (MEASURED)
REFERENCE
using the above equation. Choose V to be
as shown in Figure 13. The time
t
OUTPUT
for the write cycle).
DECAY
SIGNAL
OUTPUT STOPS DRIVING
DIS
L
is the total bus capacitance (per
) is the difference between
t
DIS
C
DECAY
ENA
t
L
DECAY
I
L
) is the interval from when
V
plus the minimum
DECAY
Figure 13. Output Enable/Disable
t
HIGH-IMPEDANCE STATE. TEST CONDITIONS
CAUSE THIS VOLTAGE LEVEL TO BE
APPROXIMATELY 1.5 V.
MEASURED
V
V
OH (MEASURED)
OL (MEASURED)
L
is
and I
L
L
, and
.
– V
+ V
–24–
INPUT OR
OUTPUT
Figure 14. Equivalent Device Loading For AC
Measurements (Includes All Fixtures)
Figure 15. Voltage Reference Levels For AC
Measurements (Except Output Enable/Disable)
* AC TIMING SPECIFICATIONS ARE CALCULATED FOR 100pF
DERATING ON THE FOLLOWING PINS: PMA23–0, PMS1–0, PMRD,
PMWR, PMPAGE, DMA31–0, DMS3–0, DMRD, DMWR, DMPAGE
OUTPUT
2.0V
1.0V
PIN
TO
t
ENA
OUTPUT STARTS DRIVING
50pF
1.5V
*
V
V
OH (MEASURED)
OL (MEASURED)
I
I
OH
OL
+1.5V
1.5V
REV. C