lan83c175 Standard Microsystems Corp., lan83c175 Datasheet - Page 61
lan83c175
Manufacturer Part Number
lan83c175
Description
Ethernet Cardbus Integrated Controller With Modem Support Corporation
Manufacturer
Standard Microsystems Corp.
Datasheet
1.LAN83C175.pdf
(92 pages)
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performs bus master transactions to two
different devices (always returns 0).
8 - nSERR ENABLE: When this bit is set the
LAN83C175 may assert nSERR. When this
bit is cleared nSERR signalling is disabled.
7 - WAIT CYCLE CONTROL: This bit is not
implemented because the LAN83C175 does
not do address/data stepping (always returns
0).
6 - PARITY ERROR RESPONSE: When this
bit is set the LAN83C175 will respond to parity
errors.
ignore parity errors.
5 through 3 - VGA PALETTE SNOOP,
MEMORY
ENABLE,
implemented (always return 0).
2 - BUS MASTER ENABLE: The LAN83C175
may only act as bus master on the CardBus
bus when this bit is set.
cleared
CardBus request signal.
1 - MEMORY SPACE ENABLE:
LAN83C175 may respond to memory space
accesses when this bit is set. When the bit is
cleared, the LAN83C175 will not respond to
memory space accesses.
0 - I/O SPACE ENABLE:
may respond to I/O space accesses when this
bit is set. When the bit is cleared, the
LAN83C175 will not respond to I/O space
accesses.
When cleared, the LAN83C175 will
the LAN83C175 will disable its
SPECIAL
WRITE
AND
CYCLES:
When this bit is
The LAN83C175
INVALIDATE
The
Not
61
08 - CLASS CODE / REVISION ID
31 through 24 - BASE CLASS: This read only
field returns the Network Controller Base Class
(02h). This returns (07h) when reading from the
modem configuration space.
23 through 16 - SUB CLASS: This read only field
returns the Ethernet Controller Sub-Class (00h).
Also returns (00h) reading from the modem
configuration space.
15 through 8 - PROGRAMMING INTERFACE:
This read only field returns 00h (no specific
register-level programming interface defined).
This returns (02h) is read from the modem
configuration space.
7 through 0 - REVISION ID: This read only field
returns the LAN83C175 silicon revision ID (00h
for XA). This returns (00h) in both configuration
spaces.
0C - HEADER TYPE / LATENCY TIMER
31 THROUGH 24: Unused (returns 00h).
23 - MULTI-FUNCTION DEVICE: This bit returns
1 to indicate that the LAN83C175 is a multi
function CardBus device.
22 through 16 - HEADER TYPE: Specifies the
format of bytes 10h - 3Ch in the configuration
space (00h).
15 through 8 - LATENCY TIMER: This byte is
programmed with the value of the Latency Timer
(in CardBus bus clocks) for LAN83C175 bus
master operations.
hardwired to 0, giving the latency timer a
granularity of 8 clocks. This register is 00h after
reset.
7 through 0: Unused (returns 00h).
The bottom three bits are
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