lan91c100 Standard Microsystems Corp., lan91c100 Datasheet - Page 17

• Manufacturer Part Number: lan91c100
• Description: Feast ? Ast Ethernet Controller
• Manufacturer: Standard Microsystems Corp.

Serial EEPROM Interface Block
This block is responsible for reading the serial
EEPROM upon hardware reset (or equivalent
command) and defining defaults for some key
registers. A write operation is also implemented
ADDRESS
CONTROL
DATA BUS
FIGURE 3 - LAN91C100 INTERNAL BLOCK DIAGRAM WITH DATA PATH
BUS
WRITE
DATA
REG
BUS INTERFACE
INTERFACE
EEPROM
EEPROM
READ
DATA
REG
COMPL
FIFO
FIFO
DATA
TX
TX
BUFFER RAM
FIFO
17
RX
ARBITER
ADDRESS
by this block which, under CPU command, will
program specific locations in the EEPROM.
This block is an autonomous state machine, and
it controls the LAN91C100's internal Data Bus
during active operation.
MMU
DMA
CSMA/CD
TRANSMIT
RECEIVE