lan9218i Standard Microsystems Corp., lan9218i Datasheet - Page 89

• Manufacturer Part Number: lan9218i
• Description: Lan9218i High-performance Single-chip 10/100 Ethernet Controller With Hp Auto-mdix And Industrial Temperature Support
• Manufacturer: Standard Microsystems Corp.

High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support
Datasheet
SMSC LAN9218i
BITS
0
Flow Control on Any Frame (FCANY). When this bit is set, the LAN9218i
will assert back pressure, or transmit a pause frame when the AFC level is
reached and any frame is received. Setting this bit enables full-duplex flow
control when the LAN9218i is operating in full-duplex mode.
When this mode is enabled during half-duplex operation, the Flow Controller
does not decode the MAC address and will send a pause frame upon
receipt of a valid preamble (i.e., immediately at the beginning of the next
frame after the RX data FIFO level is reached).
When this mode is enabled during full-duplex operation, the Flow Controller
will immediately instruct the MAC to send a pause frame when the RX data
FIFO level is reached. The MAC will queue the pause frame transmission
for the next available window.
Setting this bit overrides bits [3:1] of this register.
[19:16]
Ah
Bh
Ch
Dh
Eh
Fh
0h
1h
2h
3h
4h
5h
6h
7h
8h
9h
Table 5.5 Backpressure Duration Bit Mapping
DESCRIPTION
100Mbs Mode
100uS
150uS
200uS
250uS
300uS
350uS
400uS
450uS
500uS
550uS
600uS
10uS
15uS
25uS
50uS
DATASHEET
5uS
89
BACKPRESSURE DURATION
10Mbs Mode
102.2uS
152.2uS
202.2uS
252.2uS
302.2uS
352.2uS
402.2uS
452.2uS
502.2uS
552.2uS
602.2uS
12.2uS
17.2uS
27.2uS
52.2uS
TYPE
7.2uS
R/W
Revision 2.3 (08-06-08)
DEFAULT
0