max2364ecm-t Maxim Integrated Products, Inc., max2364ecm-t Datasheet - Page 20

• Manufacturer Part Number: max2364ecm-t
• Description: Max2360, Max2362, Max2364 Complete Dual-band Quadrature Transmitters
• Manufacturer: Maxim Integrated Products, Inc.

Complete Dual-Band
Quadrature Transmitters
The low-band tank (TANKL+, TANKL-) and high-band
tank (TANKH+, TANKH-) are fully differential. The exter-
nal tank components are shown in Figure 6. The fre-
quency of oscillation is determined by the following
equation:
C
C
C
C
traces
C
quency
C
Internal to the IC, the charge pump will have a leakage
of less than 10nA. This is equivalent to a 300MΩ shunt
resistor. The charge-pump output must see an
extremely high DC resistance of greater than 300MΩ.
This will minimize charge-pump spurs at the compari-
son frequency. Make sure there is no solder flux under
the varactor or loop filter.
The MAX2360/MAX2362/MAX2364 EV kit can be used
as a starting point for layout. For best performance,
take into consideration power-supply issues as well as
the RF, LO, and IF layout.
Figure 5. 3-Wire Interface Diagram
20
INT
D
VAR
PAR
CENT
C
= Capacitance of varactor
= External coupling capacitor to the varactor
______________________________________________________________________________________
C
f
= Internal capacitance of TANK port
OSC
= Equivalent variable tuning capacitance
= Parasitic capacitance due to PCB pads and
VAR
= External capacitor for centering oscillation fre-
=
=
2
π
2 (C
CLK
C
CS
DI
D
(C
D
INT
×
B19 (MSB)
+ C )
C
C
+
C
C
t
CENT
CS
B18
Layout Issues
1
IF Tank Design
+
C
VAR
+
B0
t
C
CH
P
A3
t
CWL
To minimize coupling between different sections of the
IC, the ideal power-supply layout is a star configuration,
which has a large decoupling capacitor at a central
V
each going to a separate V
MAX2362/MAX2364 circuit. At the end of each trace is
a bypass capacitor with impedance to ground less than
1Ω at the frequency of interest. This arrangement pro-
vides local decoupling at each V
one via per bypass capacitor for a low-inductance
ground connection.
The layout of a matching network can be very sensitive
to parasitic circuit elements. To minimize parasitic
inductance, keep all traces short and place compo-
nents as close to the IC as possible. To minimize para-
sitic capacitance, a cutout in the ground plane (and
Figure 6. Tank Port Oscillator
t
CWH
CC
node. The V
C
C
D
D
A1
C
C
C
C
C
CENT
CC
A0 (LSB)
t
ES
traces branch out from this node,
L
Matching Network Layout
t
EW
C
PAR
Power-Supply Layout
CC
t
t
t
t
t
t
CS
CH
CWH
ES
CWL
EW
node in the MAX2360/
> 50ns
> 50ns
> 10ns
> 50ns
CC
> 50ns
> 50ns
C
INT
pin. Use at least
MAX2360
MAX2362
MAX2364
-R
n