at42qt100a ATMEL Corporation, at42qt100a Datasheet - Page 6

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at42qt100a

Manufacturer Part Number
at42qt100a
Description
Qtouch? Charge Transfer Ic
Manufacturer
ATMEL Corporation
Datasheet
3.1.3
3.1.4
6
AT42QT100A
Low Power Mode (SYNC = 0)
Sync Mode
Figure 3-1.
The QT100A runs in Low Power (LP) mode if the SYNC pin is held low. In this mode it sleeps for
approximately 85 ms at the end of each burst, saving power but slowing response. On detecting
a possible key touch, it temporarily switches to Fast mode until either the key touch is confirmed
or found to be spurious (via the detect integration process). It then returns to LP mode after the
key touch is resolved, as shown in
Figure 3-2.
It is possible to synchronize the device to an external clock source by placing an appropriate
waveform on the SYNC pin. Sync mode can synchronize multiple QT100A devices to each other
to prevent cross-interference, or it can be used to enhance noise immunity from low frequency
sources such as 50Hz or 60Hz mains signals.
The Sync pin is sampled at the end of each burst. If the device is in Fast mode and the Sync pin
is sampled high, then the device continues to operate in Fast mode
SYNC is sampled low, then the device goes to sleep. From then on, it will operate in Sync mode
(Figure 3-2 on page
SYNC signal should be longer than the burst length
QT100A1
Fast Mode Bursts (SYNC Held High)
Low Power Mode (SYNC Held Low)
SNSK
SYNC
OUT
6). Therefore, to guarantee entry into Sync mode the low period of the
QT100A1
SNSK
SYNC
~85ms
sleep
Figure
~1ms
3-2.
sleep
(Figure
fast detect
integrator
3-3).
sleep
(Figure 3-1 on page
9531A–AT42–02/09
6). If

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