lm4310 National Semiconductor Corporation, lm4310 Datasheet
lm4310
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lm4310 Summary of contents
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... Mobile Pixel Link Two (MPL-2), RGB Display Differential Interface Deserializer General Description The LM4310 deserializes a Two Data + Clock Mobile Pixel Link (MPL-2) RGB serial link. Two operating modes are sup- ported: 24-bit RGB and also 18-bit RGB. The video interconnect is reduced from 28 signals to 3 differ- ...
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Pin Descriptions No. Pin Name of Pins MPL-2 SERIAL BUS PINS DD0P, DD0M, 4 DD1P, DD1M DCP, DCM 2 CONFIGURATION PINS PD RES0 2 RDS 1 Mode24 VIDEO INTERFACE PINS PCLK 1 R[7:0] 24 ...
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Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( LVCMOS Input/Output Voltage MPL Input Voltage Junction Temperature Storage Temperature Lead Temperature Soldering, 40 ...
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Switching Characteristics Over recommended operating supply and temperature ranges unless otherwise specified. (Note 2) Symbol Parameter PARALLEL BUS OUTPUT TIMING t Rise Time RISE t Fall Time FALL t Data Valid before PCLK (rise) PCLK = 30 MHz DVBC t ...
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Timing Diagrams FIGURE 1. Serial Data Valid FIGURE 2. PCLK Output Rise and Fall Time FIGURE 3. PE Output Flag Timing FIGURE 4. LVCMOS RGB Output Timing 5 20203216 20203218 20203232 20203227 www.national.com ...
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... Functional Description The LM4310 is a Mobile Pixel Link 2 DES that deserializes a Two Data + Clock MPL-2 Interface to a 24-bit or 18-bit Parallel RGB Interface depending upon configuration. The LM4310 is compatible with the LM4312 Serializer. FIGURE 5. LM4310 Block Diagram SERIAL BUS TIMING Data valid is relative to both edges of a RGB transaction as shown in Figure 6 ...
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... FS - DES SIDE FUNCTION The LM4310 DES, upon a normal power up sequence, de- tects synchronization and outputs the correct pixel data. It looks for the incrementing pattern for pixels (frames) and finding it, starts to output the pixel gray scale data and timing signals ...
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... RGB and control (VS, HS, DE and F0 and F1 bits) signals and is sent from the SER to the DES via the serial PE bit. The LM4310 DES monitors the PE bit and if a parity error is detected, it prevents the output of the known bad pixel pay- load. The last payload (Pixel data and control) is re-circulated to the DES outputs until the next valid payload is received and Frame Sequence is re-validated as shown in Figure 3 ...
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FIGURE 13. Single-ended and Differential SLVS Waveforms MPL-2 Interface The Physical Layer of the MPL-2 serial interface is based on the JEDEC SLVS standard. This defines a source and load terminated interface for use in point-to-point applications. The default signal ...
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... Ohm nominal range for the MPL-2 Link. Skew should be less than 500ps to maximize timing margins. GROUNDING While the LM4310 uses a common ground connection to the center DAP PAD. For proper operation, this DAP MUST be connected to the system ground plane. PCB RECOMMENDATIONS General guidelines for the PCB design: • ...
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Connection Diagram LLP Package TOP VIEW (not to scale) 11 20203273 www.national.com ...
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... Physical Dimensions www.national.com inches (millimeters) unless otherwise noted 48L LLP, 0.4mm pitch Order Number LM4310SM NS Package Number SNF48A 12 ...
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Notes 13 www.national.com ...
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... National Semiconductor and the National Semiconductor logo are registered trademarks of National Semiconductor Corporation. All other brand or product names may be trademarks or registered trademarks of their respective holders. ...