pi2eqx5804d Pericom Semiconductor Corporation, pi2eqx5804d Datasheet
pi2eqx5804d
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pi2eqx5804d Summary of contents
Page 1
... SCL All trademarks are property of their respective owners. Description Pericom Semiconductor’s PI2EQX5804D is a low power, PCIe® compliant signal ReDriver™. The device provides programmable equalization, amplification, and de-emphasis by using 8 select bits, to optimize performance over a variety of physical mediums by reducing Inter-symbol interference. ...
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... O I CML inputs for Channel B3, with internal 50-Ohm pull down during normal operation, and >200K-Ohm otherwise CML outputs for Channel B3, with internal 50-Ohm pull up during normal operation and 2K-Ohm pull up otherwise 10-0170 PI2EQX5804D continued on next page www.pericom.com P-0.1 05/28/10 ...
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... Selection pins for Channel Ax output level (see Output Swing Configuration I Table) w/ 100K-Ohm internal pull up Selection pins for Channel Bx output level (see Output Swing Configuration I Table) w/ 100K-Ohm internal pull SCL clock input SDA data input. 3 10-0170 PI2EQX5804D 2 C control with internal 100k-Ohm continued on next page www.pericom.com P-0.1 05/28/ ...
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... Signal detect output pin for Channel A0. SIG_A=High represents a input signal O > threshold at the differential inputs. Signal detect output pin for Channel B0. SIG_B=High represents a input signal > O threshold at the differential inputs. PWR Supply Ground PWR 1.2V Supply Voltage 4 10-0170 PI2EQX5804D www.pericom.com P-0.1 05/28/10 ...
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... Equalizer Configuration The PI2EQX5804D input equalizer compensates for signal attenuation and Inter-Symbol Interference (ISI) resulting from long signal traces or cables, vias, signal crosstalk and other factors, by boosting the gain of high-frequency signal components. Because either too little, or too much, signal compensation may be non-optimal eight levels are provided to adjust for any application. ...
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... Output Configuration The PI2EQX5804D provides flexible output strength and emphasis controls to provide the optimum signal to pre-compensate for losses across long trace or noisy environments so that the receiver gets a clean eye opening. Control of output configuration is grouped for the A and B channels, so that each channel within the group has the same setting. ...
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... Automatic Receiver Detection is a feature that can set the number of active channels. By sensing the presence of a load device on the output, the channel can be automatically enabled for operation. This allows the PI2EQX5804D to configure itself properly de- pending on the devices it is communicating with, whether 4-lane, 3-lane, 2-lane or just 1-lane device or adapter card. ...
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... OUTDIS_B0 = 0 LB_A0B0 INDIS_A0 = 0 OUTDIS_A0 = 1 INDIS_B0 = 0 OUTDIS_B0 = 0 8 10-0170 PI2EQX5804D Each lane provides a loopback mode for test purposes which is controlled strapping pin and I C register bit. The LB# pin controls all lanes together. When this pin is high normal data mode is enabled. When LB# is low the loopfeature mode is enabled ...
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... Receiver Detect Enable, controls the receiver detect operation 8 AEOC A-Channels Equalizer and Output Control 9 AEOC B-Channels Equalizer and Output Control 10 RSVD Reserved 11 RSVD Reserved All trademarks are property of their respective owners. 5.0Gbps 4-Lane PCIe® 2.0 ReDriver™ with Equalization & Emphasis 9 10-0170 PI2EQX5804D www.pericom.com P-0.1 05/28/10 ...
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... Each byte must be followed by an acknowledge bit, except for the last byte of a read cycle which ends with a stop bit. For a write cycle, the first data byte following the address byte is a dummy or fill byte that is not used by the PI2EQX5804D. ...
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... SIG_A1 SIG_B1 SIG_A2 RX50_A1 RX50_B1 RX50_A2 LB_A2B2# LB_A3B3# DE_A R/W R/W R/W LB# LB# DE_A 11 10-0170 PI2EQX5804D SIG_B2 SIG_A3 SIG_B3 RX50_B2 RX50_A3 RX50_B3 DE_B rsvd rsvd R DE_B ...
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... INDIS_A1 INDIS_B1 INDIS_A2 R/W R/W R ODIS_A1 ODIS_B1 ODIS_A2 R/W R/W R RES_A1# RES_B1# RES_A2# R/W R/W R/W RESET# RESET# RESET# 12 10-0170 PI2EQX5804D INDIS_B2 INDIS_A3 INDIS_B3 R/W R/W R ODIS_B2 ODIS_A3 ODIS_B3 R/W R/W R RES_B2# RES_A3# RES_B3# R/W R/W R/W RESET# RESET# RESET# www.pericom.com P-0 ...
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... PD_A1# PD_B1# PD_A2# R/W R/W R/W PD# PD# PD RXD_A1 RXD_B1 RXD_A2 R/W R/W R/W RXD_A RXD_B RXD_A SEL2_A D0_A D1_A R/W R/W R/W SEL2_A D0_A D1_A 13 10-0170 PI2EQX5804D PD_B2# PD_A3# PD_B3# R/W R/W R/W PD# PD# PD RXD_B2 RXD_A3 RXD_B3 R/W R/W R/W RXD_B RXD_A RXD_B D2_A S0_A S1_A R/W R/W R/W D2_A S0_A S1_A www ...
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... All trademarks are property of their respective owners. 5.0Gbps 4-Lane PCIe® 2.0 ReDriver™ with Equalization & Emphasis SEL2_B D0_B D1_B R/W R/W R/W SEL2_B D0_B D1_B 2 C interface. These bytes are R/W, byte 10 is initialized 10-0170 PI2EQX5804D D2_B S0_B S1_B R/W R/W R/W D2_B S0_B S1_B www.pericom.com P-0.1 05/28/10 ...
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... application, an offset address byte will be presented at the second byte in write command, which is called dummy byte here and will be simply ignored in this application for correct interoperation. 15 10-0170 PI2EQX5804D DATA OUT N NO ACK ACK ACK DATA IN N DATA OUT N ACK www ...
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... Conditions = 0 TO 70°C) A Conditions 16 10-0170 PI2EQX5804D Note: Stresses greater than those listed under MAXI- MUM RATINGS may cause permanent damage to the device. This is a stress rating only and func- tional operation of the device at these or any other conditions above those indicated in the opera- tional sections of this specification is not implied ...
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... PCIe® 2.0 ReDriver™ with Equalization & Emphasis Conditions Total Deterministic Note 70°C) A Conditions Single ended |VTX-D+ - VTX-D-| VTX-DIFFP VTX-D+ - VTX- VTX-D+ + VTX- 20% to 80% (3) 17 10-0170 PI2EQX5804D Min. Typ. Max. Units 0.3 Ulp-p 0.2 Ulp-p 1.5 psrms Min. Typ. Max. Units 40 ...
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... All trademarks are property of their respective owners. 5.0Gbps 4-Lane PCIe® 2.0 ReDriver™ with Equalization & Emphasis = 0 to 70°C) A Conditions I = 4mA 4mA OL = 1.2 ± 0.05v 70°C) A Conditions Min. 1.1 -0 3mA OL 0.2 18 10-0170 PI2EQX5804D Min. Typ. Max. VDD/2 +0.2 VDD+0.3 -0.3 VDD/2 -0.2 VDD-0.4 0.4 0.2 100 -20 -20 Typ. Max. 3.6 0.7 0.4 www.pericom.com P-0.1 Units V µ ...
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... All trademarks are property of their respective owners. 5.0Gbps 4-Lane PCIe® 2.0 ReDriver™ with Equalization & Emphasis 2 C-bus devices Conditions Min. 0 4.0 4.7 4.0 4.7 5.0 250 – 4.0 4.7 – IHmin 19 10-0170 PI2EQX5804D (1) Typ. Max. Unit 100 kHz – – µs – – – – 1000 ns 300 – µs – ...
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... LOW SCL t HD;STA t HD;DAT S All trademarks are property of their respective owners. 5.0Gbps 4-Lane PCIe® 2.0 ReDriver™ with Equalization & Emphasis SU;DAT t SU;STA HIGH Timing Channel Latency, 5.0 Gbps 20 10-0170 PI2EQX5804D STOP t HD;STA BUF t SU;STO P www.pericom.com P-0.1 START S 05/28/10 ...
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... Output Level Settings (1V left, and 0.5V right at 5.0 Gbps) 0.0 dB (Dx = 000) –6.5 dB (Dx = 101) All trademarks are property of their respective owners. 5.0Gbps 4-Lane PCIe® 2.0 ReDriver™ with Equalization & Emphasis Output De-emphasis Characteristics 21 10-0170 PI2EQX5804D –3.5 dB (Dx = 010) –8.5 dB (Dx = 111) www.pericom.com P-0.1 05/28/10 ...
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... AC Test Circuit Referenced in the Electrical Characteristic Table All trademarks are property of their respective owners. 5.0Gbps 4-Lane PCIe® 2.0 ReDriver™ with Equalization & Emphasis Eye Diagrams 5.0Gbps (input left, output right) FR4 A B SmA SmA Connector Connector ≤ 10-0170 PI2EQX5804D C D.U.T. In Out www.pericom.com P-0.1 05/28/10 ...
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... Low Profile Ball Grid Array (LBGA Package Code Package Description NJ Pb-free & Green 100-Contact LBGA 23 10-0170 PI2EQX5804D NJ100 2055 www.pericom.com P-0 05/28/10 ...