ds50ev401sqx National Semiconductor Corporation, ds50ev401sqx Datasheet
ds50ev401sqx
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ds50ev401sqx Summary of contents
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... The DS50EV401 is available in a 7mm x 7mm 48-pin leadless LLP package, and is powered from a single power supply of either 3.3 or 2.5V. Application Diagram © 2008 National Semiconductor Corporation Features ■ PCI Express compatible Equalizer ■ ...
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Pin Descriptions Pin Name Pin Number I/O, Type HIGH SPEED DIFFERENTIAL I/O IN_0 CML IN_0- 2 IN_1 CML IN_1- 5 IN_2 CML IN_2- 9 IN_3 CML IN_3- 12 OUT_0 CML ...
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... Note Input O = Output Connection Diagram Ordering Information NSID Package DS50EV401SQ 48 Lead LLP Package DS50EV401SQE 48 Lead LLP Package DS50EV401SQX 48 Lead LLP Package Description V = 2.5V ± 3.3V ± 10%. V pins should be tied path. A 0.1μF bypass capacitor should be connected between each V Ground reference. GND should be tied to a solid ground plane through a low impedance path ...
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Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( LVCMOS Input Voltage LVCMOS Output Voltage CML Input/Output Voltage Junction Temperature Storage Temperature ESD ...
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Symbol Parameter CML OUTPUTS (OUT_n+, OUT_n-) V Output Voltage Swing O V Output Common-Mode Voltage OCM Transition Time Output Resistance O R Differential Output Return Loss LO t Differential Low to High PLHD Propagation ...
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Timing Diagrams www.national.com FIGURE 1. Test Setup Diagram FIGURE 2. CML Output Transition Times FIGURE 3. Propagation Delay Timing Diagram 6 30050527 30050502 30050503 ...
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FIGURE 4. Idle Timing Diagram FIGURE 5. CML Output Swings at A/B 7 30050504 30050560 www.national.com ...
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Functional Description DS50EV401 APPLICATIONS INFORMATION The DS50EV401 is a programmable quad equalizer opti- mized for PCI Express applications designed to operate over copper backplanes and cables at transmission rates of 2.5 Gbps Gbps. The device ...
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Applications Information BEACON WAKEUP The DS50EV401 signal path is designed to be broadband, allowing a low frequency signal, such as the Beacon Wakeup GENERAL RECOMMENDATIONS The DS50EV401 is a high performance device capable of delivering excellent performance. In order to ...
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The CML inputs are AC coupled to the device as shown in Figure 8. Internal to the device are 50Ω terminations to V The CML outputs drive 100 Ω transmission lines and are AC coupled and terminated at their load. ...
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FR4 / BACKPLANE Typical Performance Eye Diagrams The plots show the unequalized and equalized eye patterns for various interconnects as noted. Unequalized is shown in Figure 8. Unequalized Signal (40 in FR4, 2.5 Gbps, PRBS7) Figure 10. Unequalized Signal (40 ...
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Twin-AX CABLES Typical Performance Eye Diagrams The plots show the unequalized and equalized eye patterns for various interconnects as noted. Unequalized is shown in Figure 14. Unequalized Signal ( AWG Twin-AX Cable, 2.5 Gbps, PRBS7) Figure 16. Unequalized ...
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Physical Dimensions inches (millimeters) unless otherwise noted 7mm x 7mm 48-pin LLP Package Order Number DS50EV401SQ Package Number SQA48D 13 www.national.com ...
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... National Semiconductor and the National Semiconductor logo are registered trademarks of National Semiconductor Corporation. All other brand or product names may be trademarks or registered trademarks of their respective holders. ...