ncn6004a ON Semiconductor, ncn6004a Datasheet
ncn6004a
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ncn6004a Summary of contents
Page 1
... Select signals to identify each IC connected on the bus. A built in accurate protection system guarantees timely and controlled shutdown in the case of external error conditions. On top of that, the NCN6004A can independently handle the power supply, in the range 2 5.0 V input voltage, provided to each external Smart Card. The interface monitors the current flowing into each Smart Card, a flag being set in the case of overload ...
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... Figure 1. Pin Diagram L1a L1b L2b C3 41 CRD_DET_B CRD_VCC_B 38 CRD_RST_B 31 CRD_CLK_B 39 CRD_C4_B 40 CRD_C8_B 37 CRD_IO_B 33 PWR_VCC_B 28 C1 PWR_VCC_A 10 mF NCN6004A 36 PWR_GND 25 PWR_GND 20 CRD_DET_A 29 CRD_VCC_A 23 CRD_RST_A 30 CRD_CLK_A 22 CRD_C4_A 21 CRD_C8_A 24 CRD_IO_A 100 nF C4 Figure 2. Typical Application http://onsemi.com ...
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... C4A 11 100 k C8A I/O_B 19 100 k RESET_B 18 100 k C4B 17 100 k C8B 16 EN_RPU 45 MUX_MODE 44 NCN6004A DET#A INTERRUPT BLOCK DET#B IO_A RST_A C4A RESET_A C8A CLK#A DET#A CARD#A DETECTION CLK#A CARD#B DETECTION DET#B CLK#B IO_B RST_B C4B RESET_A C8B IO_A CLK#B RST_A ...
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... PGM = H→ the NCN6004A is under normal operation and all the data with the external card can be exchanged using any of the Smart Card A or Smart Card B Lines Á ...
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... CS signal must be Low to validate the RESET function, regardless of the selected card. Assuming the mP provides two independent lines to control the RESET pins, the NCN6004A can control two cards simultaneously. When MUX_MODE = High, this pin provides an access to either card Reset by means of CARD_SEL selection bit. ...
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... The CS signal must be Low to valid the RESET function, regardless of the selected card. Assuming the mP provides two independent lines to control the RESET pins, and MUX_MODE = Low, the NCN6004A can control two cards simultaneously. When MUX_MODE = High, this pin is internally disable, a pull up resistor is connected to ...
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... V ceramic X7R or X5R capacitors in parallel is recommended. This pin is connected to the positive external power supply. The device sustains any voltage from +2 +6.0 V. This voltage supplies the NCN6004A internal circuits and is regulated by the internal DC/DC converter to provide the DC voltage to the external card. A high quality capacitor must be connected across pin 33 and PWR_GND, 10 mF/6 ...
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... This pin is connected to the positive external power supply. The device sustains any voltage from +2 +5.5 V. This voltage supplies the NCN6004A internal Analog and Logic circuits. A high quality capacitor must be connected across this pin and ANLG_GND recommended ...
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... Maximum Electrical Ratings are defined as those values beyond which damage(s) to the device may occur Human Body Model 1500 100 pF. 4. Absolute Maximum Rating beyond which damage(s) to the device may occur. NCN6004A Description This pin is activated LOW when a card has been inserted and detected in either of the external ports ...
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... V, CRD_VCC = 1 5.0 V bat Output Over Current Time Out Per Card = 22 mF, C Output Card Supply Turn On Time @ L out V = 2.7 V, CRD_VCC = 5 Assuming ANLG_VCC and PWR_VCC pins are connected to the same power supply. NCN6004A Symbol CRD_VCC CRD_VCC < 5 CRD_VCC < 5 ...
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... I/O_A Pull Up Resistance I/O_B Pull Up Resistance RESET_A Pull Up Resistance RESET_B Pull Up Resistance C4_A Pull Up Resistance C8_A Pull Up Resistance C4_B Pull Up Resistance C8_B Pull Up Resistance CS Pull Up Resistance CRD_DET_A and CRD_DET_B Pull Up Resistance NCN6004A Symbol V CCTOFF < 0 CCOFF F SW Symbol Pin ...
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... Card Insertion/Extraction Negative Going Input Low Voltage Card Detection Insertion/Extraction Digital Filtering Delay CRD_DET_A CRD_DET_B CARD_A or CARD_B short circuit current: CRD_IO, CRD_RST, CRD_C4, CRD_C8 CRD_CLK (According to ISO and EMV specifications) NCN6004A < 5.50 V, Normal Operating Mode (−25°C to +85°C ambient temperature, unless CC Symbol ...
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... Data Set−up Time, Time Reference = PGM, A0, A1, A2, A3, CARD_SEL, and CS. Data Signal Rise and Fall Time Data Hold Time, Time Reference = PGM, A0, A1, A2, A3, CARD_SEL, and CS. Chip Select CS Low State Pulse Width CS Signal Rise and Fall Time NCN6004A Symbol Pin td 24, 23, seq 30, 37, ...
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... As a matter of fact, all the card signals are routed to the selected card immediately after a CARD_SEL change, the NCN6004A taking no further logic control prior to activate the swap. To avoid any risk, one can run a sequence with the selected card, return CS to High, change the CARD_SEL according to the expected card selection, and pull CS to Low to activate the selected card ...
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... NCN6004A CRD_V CC CRD_VCC CRD_CLK CRD_CLK # 1.80 V − − 3.0 V − − 5.0 V − − − − − − 1.80 V − − 3.0 V − − 5.0 V − − − − ...
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... *The STATUS register is not affected when the NCN6004A operates in any of the programming mode. Initialized conditions upon start−up are depicted by bold characters in Table 2 and Table 4. 3.30 V 2.70 V 2.10 V 2.00 V Vbat Vbat_OK Vbat STATUS The input power supply voltage monitoring applies to the card selected. ...
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... However not possible to change the operating mode once the system has been started. If such a function is needed, one must pull down the related NCN6004A power supply, change the MUX_MODE logic level, and re−start the interface. ...
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... Force CLK to Low, unless it is already in this state Force C4 and C8 to Low Force CRD_IO to Low Shut Off the CRD_VCC Supply NCN6004A CARD POWER SUPPLY TIMING When the PWR_ON signal is high, the associated CRD_VCC_A or CRD_VCC_B power supply rise time depends upon the current capability of the DC/DC converter ...
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... On the other hand, the Power Down sequence is automatically activated when the V bat the VCC_OK level, regardless of the logic conditions Figure 10. Power Down Sequence: Timing Details NCN6004A present on the control pins, or when the related voltage drops below CRD_VCC_x output voltage reaches the overload condition. ...
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... When a card is inserted, the detector circuit asserts INT = Low as depicted before, the external mP being responsible to clear the interrupt signal, taking the necessaries actions. When the NCN6004A detects a card extraction, the power down sequence is automatically activated for the related interface section, regardless of the PWR_ON state, and the INT pin is asserted Low ...
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... According to the typical sequence depicted not possible to program simultaneously the two DC/DC NCN6004A the start−up sequence is completed. Under no situation the NCN6004A shall automatically launch a smart card ATR sequence. At the end of the transaction, asserted by the MPU (CARD_SEL = H/L, PWR_ON = L), or under a card bat extraction, the ISO7816− ...
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... OPERATION NOTE: Described operation makes reference to CARD_A and can be applied to CARD_B. The system operates with a two cycles concept: NCN6004A tpwrlow tpwrhold Figure 13. Power On Sequence Timings Chip Selected tcseldly tpwrhold ...
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... PWR_ON V0 V1 Overload VCC_OK NCN6004A The control block gives the logic states according to the bits provided by the external mP. These controls bits are applied to the selected DC/DC converter to generate the programmed output voltage. The MOS drive block includes the biases necessaries to drive the NMOS and PMOS devices as depicted in the block diagram given Figure 15 ...
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... Q5 rapidly discharges the output reservoir capacitor, making sure the output voltage is below 0.40 V when the card slides across the contacts. Based on the experiments carried out during the NCN6004A characterization, the best comprise, at time of printing this document ...
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... Figure 20. CRD_VCC Efficiency as a Function of the Input Supply Voltage NCN6004A Figure 18. Typical Card Voltage Turn ON and Start−up Figure 19. Typical Card Supply Turn OFF The curves in Figure 20, illustrate the typical behavior under full output current load (35 mA and 65 mA), according to EMV specifications ...
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... Figure 23. Output Current Limit as a Function environment matter of fact, this pulse does not come solely from the NCN6004A DC/DC converter, but the reservoir capacitor and the associated PCB tracks shall be considered as well. http://onsemi.com 5 ...
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... NCN6004A In addition, the NCN6004A adjusts the signal coming from the microprocessor to get the Duty Cycle window as defined by the ISO7816−3 specification. The logic input pins CARD_SEL, A0, A1, PGM, I/O and RESET fulfill the programming functions when both PGM and CS are Low ...
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... Since the clock signal is asynchronous the programmer to make sure the next card transaction is not activated before, respectively, either the NCN6004A CS PGM Clock is updated upon CLOCK :8 rising edge Figure 25. Clock Programming Timings CRD_CLK_A or CRD_CLK_B signal has been updated ...
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... NCN6004A Figure 27. Clock Divider Operation Figure 28. Clock Divider Timing Details Figure 29. Clock Divider: Run to Stop High Operation http://onsemi.com 29 ...
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... PARALLEL OPERATION When two or more NCN6004A parts operate in parallel on a common digital bus, the Chip Select pin allows the selection of one chip from the bank of the paralleled devices. Of course, the external MPU shall provide one unique CS line for each of the NCN6004A considered interface. When ...
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... DATA I/O LEVEL SHIFTER The built in structure provides a level shifter on each card output signals, the I/O line being driven differently as depicted in Figure 33. Since the NCN6004A can operate in NCN6004A CLK_IN_A 13 MULTIPLEX & CLOCK DIVIDER ...
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... CARD_SEL 45 EN_RPU Figure 33. Dual Bi−directional I/O Line Level Shifter and Multiplex NCN6004A is routed to the appropriate card by means of the CARD_SEL logic signal. In this mode, the I/O_B pin 19 must be left open since the internal data signal will be present on this pin. Moreover, since R1 and R3 are in parallel, the pull up ...
Page 33
... STATUS pin accordingly. Battery Voltage: Both the Positive going and the Negative going voltage are detected by the NCN6004A, a POWER_DOWN sequence and the STATUS register being updated accordingly. The external MPU can read the STATUS pin to take whatever is appropriate to cope with the situation ...
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... Status 1 VCC TP22 PWR_ON TP20 TP21 A1 TP19 1 A2 TP18 A3 1 TP17 Card_Sel TP16 1 PGM TP15 1 CS VCC J1 NCN6004A 220 nF C13 D6 R12 VCC C6 1.5 k CRD_VCC_A GND 4.7 mF, X7R Q2 C10 R15 GND C_CLK_B GND GND + 4.7uF, X7R J10 1 CRD_VCC_A R13 1 ...
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... NCN6004A Figure 36. Demo Board PCB Top Overlay http://onsemi.com 35 ...
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... NCN6004A Figure 37. Demo Board PCB Top Layer http://onsemi.com 36 ...
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... NOTE: Note: the demo board is built with a four layers PCB, the internal ones being dedicated to V planes. NCN6004A Figure 38. Demo Board PCB Bottom Layer http://onsemi.com 37 and GND CC ...
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... Figure 15: Basic DC/DC Converter Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Figure 16: Theoretical DC/DC Operating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . NCN6004A . . . . . . 4 Figure 17: Typical CRD_VCC Ripple Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... V Smart Card ANLG_VCC = VCC = V Input Voltage bat PWR_ON Chip Power On bit MUX_MODE Card Multiplex or Parallel Op. CRD_DET_B Card insertion/extraction detection T1 Smart Card Data transfer pro- cedure by strings NCN6004A CRD_VCC_A CRD_CLK_A CRD_RST_A CRD_IO_A CRD_C4_A CRD_C8_A CRD_DET_A CARD_SEL EN_RPU PGM ISO CRD_VCC_B CRD_C4_B ...
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... M 12 REF N 0.090 0.160 P 0.250 BSC R 0.150 0.250 S 9.000 BSC Z S1 4.500 BSC T 5.000 BSC V 9.000 BSC V1 4.500 BSC W 0.200 REF AA 1.000 REF ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. NCN6004A/D ...