lmv301-mdc National Semiconductor Corporation, lmv301-mdc Datasheet - Page 13

• Manufacturer Part Number: lmv301-mdc
• Description: Low Input Bias Current, 1.8v Op Amp W/ Rail-to-rail Output
• Manufacturer: National Semiconductor Corporation

Application Hints
Capacitive Load Tolerance
Like many other op amps, the LMV301 may oscillate when
its applied load appears capacitive. The threshold of
oscillation varies both with load and circuit gain. The
configuration most sensitive to oscillation is a unity gain
follower. The load capacitance interacts with the op amp’s
output resistance to create an additional pole. If this pole
frequency is sufficiently low, it will degrade the op amp’s
phase margin so that the amplifier is no longer stable. As
shown in Figure 2 , the addition of a small resistor (50
100 ) in series with the op amp’s output, and a capacitor
(5pF to 10pF) from inverting input to output pins, returns the
phase margin to a safe value without interfering with lower
frequency
capacitance can be tolerated without oscillation. Note that in
all cases, the output will ring heavily when the load
capacitance is near the threshold for oscillation.
Capacitive load driving capability is enhanced by using a pull
up resistor to V
conducting 500µA or more will significantly improve
capacitive load responses. The value of the pull up resistor
must be determined based on the current sinking capability
of the amplifier with respect to the desired output swing.
Open loop gain of the amplifier can also be affected by the
pull up resistor.
FIGURE 2. Rx, Cx Improve Capacitive Load Tolerance
circuit
+
( Figure 3 ). Typically a pull up resistor
operation. Thus,
(Continued)
larger
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to
of
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PRINTED-CIRCUIT-BOARD LAYOUT
FOR HIGH-IMPEDANCE WORK
It is generally recognized that any circuit which must operate
with less than 100pA of leakage current requires special
layout of the PC board. When one wishes to take advantage
of the low bias current of the LMV301, typically less than
0.182pA, it is essential to have an excellent layout.
Fortunately, the techniques for obtaining low leakages are
quite simple. First, the user must not ignore the surface
leakage of the PC board, even though it may sometimes
appear acceptable low, because under conditions of the high
humidity or dust or contamination, the surface leakage will
be appreciable. To minimized the effect of any surface
leakage, lay out a ring of foil completely surrounding the
LMV301’s inputs and the terminals of capacitors, diodes,
conductors, resistors, relay terminals, etc. connected to the
op amp’s inputs. See Figure 4 . To have a significant effect,
guard rings should be placed on both the top and bottom of
the PC board. The PC foil must then be connected to a
voltage which is at the same voltage as the amplifier inputs,
since no leakage current can flow between two points at the
same potential. For example, a PC board trace-to-pad
resistance of 10
large resistance, could leak 5pA if the trace were a 5V bus
adjacent to the pad of an input. This would cause a 100
times degradation from the LMV301’s actual performance.
However, if a guard ring is held within 5mV of the inputs, then
even a resistance of 10
leakage current, or perhaps a minor (2:1) degradation of the
amplifier performance. See Figure 5a, Figure 5b, Figure 5c
for typical connections of guard rings for standard op amp
configurations. If both inputs are active and at high
impedance, the guard can be tied to ground and still provide
some protection; see Figure 5d.
FIGURE 3. Compensating for Large Capacitive Loads
FIGURE 4. Example, using the LMV301,
of Guard Ring in P.C. Board Layout
12
with a Pull Up Resistor
, which is normally considered a very
11
would cause only 0.05pA of
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