74abt834d NXP Semiconductors, 74abt834d Datasheet

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74abt834d

Manufacturer Part Number
74abt834d
Description
Octal Inverting Transceiver With Parity Generator/checker 3-state
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors Advanced BiCMOS Products
FEATURES
DESCRIPTION
The 74ABT834 high–performance BiCMOS
device combines low static and dynamic
QUICK REFERENCE DATA
ORDERING INFORMATION
June 9, 1992
PIN CONFIGURATION
Low static and dynamic power dissipation
with high speed and high output drive
Open–collector ERROR output
Output capability: +64mA/–32mA
Latch–up protection exceeds 500mA per
Jedec JC40.2 Std 17
ESD protection exceeds 2000 V per MIL
STD 883C Method 3015.6 and 200 V per
Machine Model
Power up/down 3–State
Octal inverting transceiver with parity
generator/checker (3–State)
SYMBOL
C
I
t
t
t
t
C
PLH
PHL
PLH
PHL
CCZ
OUT
IN
24–pin plastic SOL (300mil)
24–pin plastic DIP (300mil)
PACKAGES
Propagation delay
An to Bn or Bn to An
Propagation delay
An to PARITY
Input capacitance
Output capacitance
Total supply current
ERROR
CLEAR
OEA
GND
A0
A1
A2
A3
A4
A6
A7
A5
10
11
12
1
2
3
4
5
6
7
8
9
PARAMETER
TOP VIEW
24
23
22
20
19
18
17
16
15
14
13
21
V
B0
B1
B2
B3
B4
B5
B6
B7
PARITY
OEB
CP
CC
power dissipation with high speed and high
output drive.
The 74ABT834 is an octal inverting
transceiver with a parity generator/checker
and is intended for bus–oriented applications.
When Output Enable A (OEA) is High, it will
place the A outputs in a high impedance
state. Output Enable B (OEB) controls the B
outputs in the same way.
The parity generator creates an odd parity
output (PARITY) when OEB is Low. When
OEA is Low, the parity of the B port, including
the PARITY input, is checked for odd parity.
When an error is detected, the error data is
C
C
V
V
Outputs disabled; V
L
L
I
I
= 0V or V
= 0V or V
= 50pF; V
= 50pF; V
T
amb
–40 C to +85 C
–40 C to +85 C
CONDITIONS
= 25 C; GND = 0V
1
CC
CC
T
CC
CC
amb
LOGIC SYMBOL
= 5V
= 5V
CONDITIONS
= 25 C; GND = 0V
CC
=5.5V
14
13
11
1
OEB
OEA
CLEAR
CP
A0 A1 A2 A3 A4 A5 A6 A7
B0 B1 B2 B3 B4 B5 B6 B7
23 22 21 20 19 18 17 16
sent to the input of a storage register. If a
Low–to–High transition happens at the clock
input (CP), the error data is stored in the
register and the Open–collector error flag
(ERROR) will go Low. The error flag register
is cleared with a Low pulse on the CLEAR
input.
If both OEA and OEB are Low, data will flow
from the A bus to the B bus and the part is
forced into an error condition which creates
an inverted PARITY output. This error
condition can be used by the designer for
system diagnostics.
2
3
4
5
6
7
ORDER CODE
TYPICAL
74ABT834N
74ABT834D
PARITY
8
ERROR
3.4
7.4
50
Objective specification
4
7
74ABT834
9
15
10
UNIT
pF
pF
ns
ns
A

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74abt834d Summary of contents

Page 1

... PARITY output. This error condition can be used by the designer for system diagnostics. TYPICAL UNIT 3 ORDER CODE 74ABT834N 74ABT834D OEB 15 PARITY OEA CLEAR 10 ERROR CP ...

Page 2

Philips Semiconductors Advanced BiCMOS Products Octal inverting transceiver with parity generator/checker (3–State) PIN DESCRIPTION SYMBOL PIN NUMBER – 23, 22, 21, 20, B0 – B7 19, 18, 17, 16 OEA ...

Page 3

Philips Semiconductors Advanced BiCMOS Products Octal inverting transceiver with parity generator/checker (3–State) LOGIC DIAGRAM 8 A0 – A7 OEB OEA CLEAR 1, 2 ABSOLUTE MAXIMUM RATINGS SYMBOL PARAMETER V DC supply voltage input diode ...

Page 4

Philips Semiconductors Advanced BiCMOS Products Octal inverting transceiver with parity generator/checker (3–State) RECOMMENDED OPERATING CONDITIONS SYMBOL V DC supply voltage CC V Input voltage I V High–level input voltage IH V Input voltage IL V High–level output voltage, ERROR OH ...

Page 5

Philips Semiconductors Advanced BiCMOS Products Octal inverting transceiver with parity generator/checker (3–State) AC CHARACTERISTICS GND = 0V 2.5ns 50pF 500 SYMBOL PARAMETER t Propagation delay PLH t An ...

Page 6

Philips Semiconductors Advanced BiCMOS Products Octal inverting transceiver with parity generator/checker (3–State) AC WAVEFORMS V = 1.5V GND to 3. INPUT PHL OUTPUT V M Waveform 1. Propagation Delay For Inverting Output OEA, ...

Page 7

Philips Semiconductors Advanced BiCMOS Products Octal inverting transceiver with parity generator/checker (3–State) TYPICAL PROPAGATION DELAYS VERSUS LOAD FOR OPEN COLLECTOR OUTPUTS NOTE: When using Open–Collector parts, the value of ...

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