74abt834d NXP Semiconductors, 74abt834d Datasheet - Page 2
74abt834d
Manufacturer Part Number
74abt834d
Description
Octal Inverting Transceiver With Parity Generator/checker 3-state
Manufacturer
NXP Semiconductors
Datasheet
1.74ABT834D.pdf
(7 pages)
1. Error checking is detailed in the Error Flag Function Table below.
2. When clocked, the error output is Low if the sum of A inputs is even or High if the sum of A inputs is odd.
Philips Semiconductors Advanced BiCMOS Products
PIN DESCRIPTION
FUNCTION TABLE
NOTES:
ERROR FLAG FUNCTION TABLE
H
L
X
NA = Not applicable
NC = No change
Z
June 9, 1992
A data to B bus and generate odd parity
output
B data to A bus and check for parity error
A bus and B bus disabled
A data to B bus and generate inverted
parity output
Sample
Hold
Clear
Octal inverting transceiver with parity
generator/checker (3–State)
SYMBOL
= High voltage level steady state
= Low voltage level steady state
= Don’t care
= High impedance ”off” state
= Low–to–High clock transition
= Not a Low–to–High clock transition
A0 – A7
B0 – B7
PARITY
ERROR
CLEAR
GND
OEA
OEB
V
CP
CC
MODE
MODE
PIN NUMBER
23, 22, 21, 20,
2
19, 18, 17, 16
2, 3, 4, 5,
6, 7, 8, 9
CLEAR
14
15
10
13
12
24
11
1
H
H
H
H
L
1
CP
A port 3–State inputs/outputs
B port 3–State inputs/outputs
Enables the A outputs when Low
Enables the B outputs when Low
Parity output
Error output
Clears the error flag register when Low
Clock input
Ground (0V)
Positive supply voltage
OEB
X
X
H
H
L
L
INPUTS
NAME AND FUNCTION
OEA
H
H
L
L
Bn + Parity
of Lows
Even
Odd
X
X
X
INPUTS
2
(output)
of Highs
Even
Even
Odd
Odd
An
NA
X
Internal node
Bn + Parity
Point ”P”
(output)
(output)
of Lows
Even
Odd
NA
NA
X
H
X
X
X
L
(input)
(input)
NA
NA
An
Bn
Z
ERRORn–1
Pre–state
Output
H
X
X
X
L
OUTPUTS
(input)
NA
Bn
An
An
Objective specification
74ABT834
Z
OUTPUT
ERROR
NC
PARITY
H
H
L
L
(input)
NA
H
Z
H
L
L