dm74ls323wm National Semiconductor Corporation, dm74ls323wm Datasheet - Page 4

• Manufacturer Part Number: dm74ls323wm
• Description: 8-bit Universal Shift/storage Register With Synchronous Reset And Common I/o Pins
• Manufacturer: National Semiconductor Corporation

Functional Description
The ’LS323 contains eight edge-triggered D-type flip-flops
and the interstage logic necessary to perform synchronous
reset shift left shift right parallel load and hold operations
The type of operation is determined by S0 and S1 as shown
in the Mode Select Table All flip-flop outputs are brought
out through TRI-STATE buffers to separate I O pins that
also serve as data inputs in the parallel load mode Q0 and
Q7 are also brought out on other pins for expansion in serial
shifting of longer words
A LOW signal on SR overrides the Select inputs and allows
the flip-flops to be reset by the next rising edge of CP All
other state changes are also initiated by the LOW-to-HIGH
CP transition Inputs can change when the clock is in either
state provided only that the recommended setup and hold
times relative to the rising edge of CP are observed
A HIGH signal on either OE1 or OE2 disables the TRI-
STATE buffers and puts the I O pins in the high impedance
state In this condition the shift load hold and reset opera-
tions can still occur The TRI-STATE buffers are also dis-
abled by HIGH signals on both S0 and S1 in preparation for
a parallel load operation
4
H
L
X
Logic Symbol
SR S1 S0 CP
H
H
H
H
L
e
e
e
LOW Voltage Level
Immaterial
HIGH Voltage Level
Inputs
X
H
H
H
L
H L Parallel Load I O
H L Shift Right DS0
H
X L Synchronous Reset Q0 – Q7
L L Shift Left DS7
X
Hold
Mode Select Table
Response
x
x
V
GND
n
CC
x
Q7 Q7
Q0 Q0
e
e
Q
Pin 20
Pin 10
n
x
x
e
TL F 9829 – 2
Q6 etc
LOW
Q1 etc