at24c256c ATMEL Corporation, at24c256c Datasheet
at24c256c
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at24c256c Summary of contents
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... Die Sales: Wafer Form, Waffle Pack and Bumped Wafers Description The AT24C256C provides 262,144 bits of serial electrically erasable and programmable read-only memory (EEPROM) organized as 32,768 words of 8 bits each. The device’s cascadable feature allows up to eight devices to share a common two-wire bus ...
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... SDA LOGIC LOAD DEVICE ADDRESS COMPARATOR OUT AT24C256C [Preliminary] 2 *NOTICE: Stresses beyond those listed under “Absolute SERIAL CONTROL LOGIC COMP LOAD INC R/W DATA WORD ADDR/COUNTER Y DEC Maximum Ratings” may damage to the device. This is a stress rating only ...
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... Atmel recommends always connecting the WP pins to a known state. When using a pull-up resistor, Atmel recommends using 10kΩ or less. 8568A–SEEPR–11/08 ) for compatibility with other AT24Cxx devices. When the pins are hardwired, as many as , all write operations to the memory are inhibited. If the pin is left floating, the WP pin will be AT24C256C [Preliminary] “Device 3 ...
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... Memory Organization AT24C256C, 256K SERIAL EEPROM: The 256K is internally organized as 512 pages of 64 bytes each. Random word addressing requires a 15-bit data word address. Table 2. Pin Capacitance Applicable over recommended operating range from 25° 1.0 MHz, V Symbol C Input/Output Capacitance (SDA) I/O C Input Capacitance ( ...
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... Input rise and fall times: ≤ Input and output timing reference voltages: 0.5 V 8568A–SEEPR–11/08 = +1.8V to +5.5V 100 pF (unless otherwise noted). Parameter (1) (1) (1) ): 1.3 kΩ (2.5V, 5.5V), 10 kΩ (1.8V 0 AT24C256C [Preliminary] Test conditions are listed in Note 2. 1.8-volt 2.5, 5.0-volt Min Max Min 400 1.3 0.4 0.6 0.4 100 0.05 ...
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... ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The EEPROM sends a “0” during the ninth clock cycle to acknowledge that it has received each word. STANDBY MODE: The AT24C256C features a low-power standby mode that is enabled upon power-up and after the receipt of the stop bit and the completion of any internal operations. ...
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... HIGH LOW LOW t t HD.STA HD.DAT t AA ACK ( STOP CONDITION is the time from a valid stop condition of a write sequence to the end of the WR AT24C256C [Preliminary] Start bit Stop bit SU.DAT SU.STO BUF START CONDITION 7 ...
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... Figure 7. Output Acknowledge SCL DATA IN DATA OUT AT24C256C [Preliminary 8568A–SEEPR–11/08 ...
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... Upon a compare of the device address, the EEPROM will output a “0” compare is not made, the device will return to a standby state. DATA SECURITY: The AT24C256C has a hardware data protection scheme that allows the user to write protect the whole memory when the WP pin 8568A– ...
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... Only if the internal write cycle has completed will the EEPROM respond with a “0”, allowing the read or write sequence to continue. AT24C256C [Preliminary the nonvolatile memory. All inputs are disabled during this write cycle and the WR 8568A– ...
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... The EEPROM acknowledges the device address and serially clocks out the data word. The microcontroller does not respond with a “0” but does generate a following stop condition. (Refer to Figure 12) Figure 12. Random Read * = DON’T CARE bit Note: 8568A–SEEPR–11/08 AT24C256C [Preliminary] 11 ...
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... The sequential read operation is terminated when the microcontroller does not respond with a “0” but does generate a following stop condition (refer to Figure 13). Figure 13. Sequential Read AT24C256C [Preliminary] 12 8568A–SEEPR–11/08 ...
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... AT24C256C Ordering Codes Ordering Code AT24C256C-PU (Bulk Form Only) (1) AT24C256CN-SH-B (NiPdAu Lead Finish) (2) AT24C256CN-SH-T (NiPdAu Lead Finish) (1) AT24C256CW-SH-B (NiPdAu Lead Finish) (2) AT24C256CW-SH-T (NiPdAu Lead Finish) (1) AT24C256C-TH-B (NiPdAu Lead Finish) (2) AT24C256C-TH-T (NiPdAu Lead Finish) (2) AT24C256CY7-YH-T (NiPdAu Lead Finish) (2) AT24C256CU2-UU-T AT24C256C-W-11 1. “-B” denotes bulk. ...
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... --- --- --- --- --- --- --- --- --- --- Bottom Mark --- --- --- --- --- --- --- X X --- --- --- --- --- --- --- <- Pin 1 Indicator AT24C256C [Preliminary] 14 Seal Year Seal Week Y = SEAL YEAR 6: 2006 7: 2007 2008 9: 2009 1 Lot Number to Use ALL Characters in Marking BOTTOM MARK Seal Year Seal Week Y = SEAL YEAR ...
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... TC = TRACE CODE 8568A–SEEPR–11/08 Seal Year Seal Week Y = SEAL YEAR 6: 2006 7: 2007 2008 9: 2009 1 2ECU YMTC <--- Pin 1 This Corner 2007 2008 2009 AT24C256C [Preliminary SEAL WEEK 0: 2010 02 = Week 2 1: 2011 04 = Week 4 2: 2012 :: : :::: : 3: 2013 :: : :::: :: 50 = Week Week 52 15 ...
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... E and eA measured with the leads const r ained to be perpendicular to datum. 5. Pointed or rounded lead tips are pre ferred to ease insertion and b3 maximum dimensions do not include Dambar prot r usions. Dambar protrusions shall not exceed 0.010 (0.25 mm). 2325 Orchard Parkway San Jose, CA 95131 R AT24C256C [Preliminary ...
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... E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R 8568A–SEEPR–11/ TITLE 8S1, 8-lead (0.150" Wide Body), Plastic Gull Wing Small Outline (JEDEC SOIC) AT24C256C [Preliminary End View COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM A 1.35 – 1. ...
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... It is recommended that upper and l o wer cavities be equal. If they are different, the larger dimension shall be regarded. 4. Determines the true geometric position. 5. Values b,C apply to plated terminal. The standard thickness of the plating layer shall measure between 0.007 to .021 mm. 2325 Orchard Parkway San Jose, CA 95131 R AT24C256C [Preliminary ...
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... D E Top View A1 BALL PAD CORNER (d1) Bottom View 8 Solder Balls TITLE 8U2-1, 8-ball, 2.35 x 3.73 mm Body, 0.75 mm pitch, Small Die Ball Grid Array Package (dBGA2) AT24C256C [Preliminary Side View COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MAX MIN NOM A 0.81 0.91 1. ...
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... Dimension b does not include Dambar prot rusion. Allowable Dambar prot rusion shall be 0.08 mm total in excess of the b dimension at maxi mum mate rial condition . Dambar cannot be located on the l ower radius of the foot. Minimum space between protrusion and adjacent lead is 0. Dimension D and dete rmined at Datum Plane H . 2325 Orchard Parkway San Jose, CA 95131 R AT24C256C [Preliminary TITLE 8A2, 8-lead, 4 ...
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... SAP PIN 1 INDEX AREA D 1150 E. Cheyeene Mtn. Blvd. Colorado Springs, CO 80906 R 8568A–SEEPR–11/ TITLE 8Y7, 8-lead (6.00 x 4.90 mm Body) Ultra-Thin SOIC Array Package (UTSAP) Y7 AT24C256C [Preliminary] PIN COMMON DIMENSIONS (Unit of Measure = mm) MIN NOM MAX SYMBOL A – – ...
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... Appendix A. Revision History Doc. Rev. 8568A AT24C256C [Preliminary] 22 Date 11/2008 Initial document release Comments 8568A–SEEPR–11/08 ...
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... Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © 2008 Atmel Corporation. All rights reserved. Atmel®, Atmel logo and combinations thereof, and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. ...