25lc160t-isn Microchip Technology Inc., 25lc160t-isn Datasheet - Page 11

no-image

25lc160t-isn

Manufacturer Part Number
25lc160t-isn
Description
16k Spi? Bus Serial Eeprom
Manufacturer
Microchip Technology Inc.
Datasheet
FIGURE 3-7:
3.7
The following protection has been implemented to
prevent inadvertent writes to the array:
• The write enable latch is reset on power-up
• A WRITE ENABLE instruction must be issued to
• After a byte write, page write, or Status register
• CS must be set high after the proper number of
• Access to the array during an internal write cycle
TABLE 3-3:
 2004 Microchip Technology Inc.
SCK
set the write enable latch
write, the write enable latch is reset
clock cycles to start an internal write cycle
is ignored and programming is continued
CS
SO
WPEN
SI
X
0
1
X
Data Protection
0
0
WRITE-PROTECT FUNCTIONALITY MATRIX
High
Low
WP
X
X
0
WRITE STATUS REGISTER TIMING SEQUENCE
1
0
2
instruction
WEL
0
0
1
1
1
3
0
4
Protected Blocks
0
5
Protected
Protected
Protected
Protected
25AA160/25LC160/25C160
High-impedance
0
6
1
7
3.8
The 25XX160 powers on in the following state:
• The device is in low power Standby mode (CS = 1)
• The write enable latch is reset
• SO is in high-impedance state
• A low level on CS is required to enter active state
7
8
Unprotected Blocks
6
9
Power On State
data to Status register
Protected
Writable
Writable
Writable
10
5
11
4
12
3
13
2
Status Register
14
DS21231D-page 11
1
Protected
Protected
Writable
Writable
15
0

Related parts for 25lc160t-isn