at45db021b ATMEL Corporation, at45db021b Datasheet - Page 8

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at45db021b

Manufacturer Part Number
at45db021b
Description
At45db021b 2-megabit 2.7-volt Only Dataflash
Manufacturer
ATMEL Corporation
Datasheet

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5.3
5.3.1
5.3.2
5.3.3
8
Additional Commands
AT45DB021B
Main Memory Page to Buffer Transfer
Main Memory Page to Buffer Compare
Auto Page Rewrite
A page of data can be transferred from the main memory to either buffer 1 or buffer 2. To start
the operation, an 8-bit opcode, 53H for buffer 1 and 55H for buffer 2, must be followed by the
five reserved bits, 10 address bits (PA9-PA0) which specify the page in main memory that is to
be transferred, and nine don’t care bits. The CS pin must be low while toggling the SCK pin to
load the opcode, the address bits, and the don’t care bits from the SI pin. The transfer of the
page of data from the main memory to the buffer will begin when the CS pin transitions from a
low to a high state. During the transfer of a page of data (t
determine whether the transfer has been completed or not.
A page of data in main memory can be compared to the data in buffer 1 or buffer 2. To initiate
the operation, an 8-bit opcode (60H for buffer 1 and 61H for buffer 2) must be followed by 24
address bits consisting of the five reserved bits, 10 address bits (PA9-PA0) which specify the
page in the main memory that is to be compared to the buffer, and nine don’t care bits. The CS
pin must be low while toggling the SCK pin to load the opcode, the address bits and the don’t
care bits from the SI pin. On the low-to-high transition of the CS pin, the 264 bytes in the
selected main memory page will be compared with the 264 bytes in buffer 1 or buffer 2. During
this time (t
pare operation, bit 6 of the status register is updated with the result of the compare.
This mode is needed only if multiple bytes within a page or multiple pages of data are modified in
a random fashion. This mode is a combination of two operations: Main Memory Page to Buffer
Transfer and Buffer to Main Memory Page Program with Built-in Erase. A page of data is first
transferred from the main memory to buffer 1 or buffer 2, and then the same data (from buffer 1
or buffer 2) is programmed back into its original page of main memory. To start the rewrite oper-
ation, an 8-bit opcode (58H for buffer 1 or 59H for buffer 2) must be followed by the five reserved
bits, 10 address bits (PA9-PA0) that specify the page in main memory to be rewritten, and nine
additional don’t care bits. When a low-to-high transition occurs on the CS pin, the part will first
transfer data from the page in main memory to a buffer and then program the data from the
buffer back into same page of main memory. The operation is internally self-timed and should
take place in a maximum time of t
part is busy.
If a sector is programmed or reprogrammed sequentially page-by-page, then the programming
algorithm shown in
page or several pages are programmed randomly in a sector, then the programming algorithm
shown in
updated/rewritten at least once within every 10,000 cumulative page erase/program operations
in that sector.
Figure 15-2
XFR
), the status register will indicate that the part is busy. On completion of the com-
Figure 15-1
on
page 26
on
EP
page 25
. During this time, the status register will indicate that the
is recommended. Each page within a sector must be
is recommended. Otherwise, if multiple bytes in a
XFR
), the status register can be read to
1937J–DFLSH–9/05

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