n25q032 Numonyx, n25q032 Datasheet - Page 97

• Manufacturer Part Number: n25q032
• Description: 32-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
• Manufacturer: Numonyx

9.2.5
9.2.6
Write Enable (WREN)
The Write Enable (WREN) instruction sets the Write Enable Latch (WEL) bit.
Apart form the parallelizing of the instruction code on the two pins DQ0 and DQ1, the
instruction functionality is exactly the same as the Write Enable (WREN) instruction of the
Extended SPI protocol.
Figure 47. Write Enable instruction sequence DIO-SPI
Write Disable (WRDI)
The Write Disable (WRDI) instruction resets the Write Enable Latch (WEL) bit.
Apart form the parallelizing of the instruction code on the two pins DQ0 and DQ1, the
instruction functionality is exactly the same as the Write Disable (WRDI) instruction of the
Extended SPI protocol, please refer to
details.
Figure 48. Write Disable instruction sequence DIO-SPI
S
C
DQ0
DQ1
C
DQ0
DQ1
S
0
Instruction
1
2
3
0
Instruction
Section 9.1.11: Write Disable (WRDI)
4
1
2
3
4
for further
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