tc58nvg0s3eta00 TOSHIBA Semiconductor CORPORATION, tc58nvg0s3eta00 Datasheet - Page 45

• Manufacturer Part Number: tc58nvg0s3eta00
• Description: 1 Gbit 128m ? 8 Bit Cmos Nand E2prom
• Manufacturer: TOSHIBA Semiconductor CORPORATION

RY
/
BY
Data Cache
Page Buffer
Cell Array
B
B
Page M + Rn − 1
10
11
(*1) Since the last page programming by the 10h command is initiated after the previous cache program, the t
NOTE) This operation needs to be executed within District-0 or District-1.
Command
Copy Page address (M + Rn) is input and if the data needs to be changed, changed data is input.
By issuing the 10h command, the data in the Page Buffer is programmed to Page M + Rn.
input
8C
10
Data input is required only if previous data output needs to be altered.
If the data has to be changed, locate the desired address with the column and page address input after the 8Ch command, and change only the data that needs be changed.
If the data does not have to be changed, data input cycles are not required.
Make sure WP is held to High level when Page Copy (2) operation is performed.
Also make sure the Page Copy operation is terminated with 8Ch-10h command sequence
CA0 to CA11, PA0 to PA15
Data for Page M + Rn
t
PROG
Address input
(Page M+Rn)
Address
= t
PROG
of the last page + tPROG of the previous page − ( command input cycle + address input cycle + data output/input cycle time of the last page)
Page N + Pn
Data input
10
11
Data for Page M + Rn
10
11
t
PROG
70
(*1)
Status output
45
PROG
here will be expected as the following,
TC58NVG0S3ETA00
2010-01-25C