hm62256b ETC-unknow, hm62256b Datasheet - Page 12

• Manufacturer Part Number: hm62256b
• Description: 256k Sram 32-kword 8-bit
• Manufacturer: ETC-unknow

HM62256B Series
Low V
Parameter
V
Data retention current
Chip deselect to data
retention time
Operation recovery time
Notes: 1. Typical values are at V
Low V
12
CC
V
CS
for data retention
CC
CC
2. 10 A max. at Ta = 0 to +40 C.
3. This characteristic is guaranteed only for L-SL version, 3 A max. at Ta = 0 to +40 C.
4. This characteristic is guaranteed only for L-UL version, 0.6 A max. at Ta = 0 to +40 C.
5. t
6. CS controls address buffer, WE buffer, OE buffer, and Din buffer. If CS controls data retention
CC
2.2V
V
Data Retention Timing Waveform
4.5V
0V
mode, Vin levels (address, WE, OE, I/O) can be in the high impedance state.
DR
Data Retention Characteristics (Ta = 0 to 70 C)
RC
= Read cycle time.
t
CDR
Symbol
V
I
I
I
t
t
CCDR
CCDR
CCDR
CDR
R
DR
CC
= 3.0 V, Ta = +25 C and not guaranteed.
Min
2.0
—
—
—
0
t
RC
*
5
Data retention mode
CS
Typ*
—
0.05
0.05
0.05
—
—
V
1
CC
Max
5.5
30*
10*
3*
—
—
0.2V
4
2
3
Unit
V
ns
ms
A
A
A
Test conditions*
CS
Vin
V
CS
See retention Waveform
CC
= 3.0 V, Vin
V
0V
V
t
R
CC
CC
– 0.2 V,
– 0.2 V
6
0V